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1.5 V
V
OH
V
OL
1.5 V
2 V
0.8 VV
OL
+ 0.3 V
t
PZH
t
PHZ
t
PZL
t
PLZ
VOLTAGE WAVEFORMS
Input DE
3 V
0 V
1.3 V1.3 V
C1
C2
C3
R3
R1
R2
0 V
or
3 V
1.5 V
S1
See Note A
TEST CIRCUIT
V
OH
- 0.3 V
Pulse
Generator
50 Ω
See Note B
DE
Output
Output
NOTES: A. C1, C2, and C3 include probe and jig capacitance.
B.
r
= t
f
≤ 6 ns.
Y
Z
-2.5 V
2.5 V
V
OL
V
OH
0 V
10%
90%
t
PHL
t
PLH
VOLTAGE WAVEFORMS
R
L
A Input
V
CC
B Input
Device
Under
Test
C
L
= 50 pF
(see Note A)
S1
TEST CIRCUIT
90%
10%
t
TLH
50%
t
THL
Output
B Input
A Input = 0 V
(see Note B)
50%
NOTES: A. C
L
includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR≤ 1 MHz, duty cycle = 50%, t
r
= t
f
≤ 6 ns.
R
L
V
CC
Device
Under
Test
C
L
= 50 pF
(see Note A)
S1
TEST CIRCUIT
t
PZL
t
PLZ
3 V
0 V
RE Input
(see Note B)
1.3 V 1.3 V
GND
Output
V
OH
V
CC
Output
V
OL
50%
50%
t
PZH
t
PHZ
V
ID
= -2.5 V
or 2.5 V
t
PZH
, t
PHZ
Measurement: S1 to GND
t
PZL
, t
PLZ
Measurement: S1 to V
CC
VOLTAGE WAVEFORMS
RE Input
NOTES: A. C
L
includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR≤ 1 MHz, duty cycle = 50%, t
r
= t
f
≤ 6 ns.
V
OL
+ 0.5 V
V
OH
– 0.5 V
SN65C1167E , , SN65C1168E
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
WITH ± 15-kV ESD PROTECTION
SLLS740A – MARCH 2007 – REVISED APRIL 2007
PARAMETER MEASUREMENT INFORMATION (continued)
Figure 4. Driver Test Circuit and Voltage Waveforms
Figure 5. Receiver Test Circuit and Voltage Waveforms
Figure 6. Receiver Test Circuit and Voltage Waveforms
9
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