Datasheet

SN65175, SN75175
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS145C − OCTOBER 1990 − REVISED NOVEMBER 2006
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
logic symbol
4Y
3Y
2Y
1Y
4B
4A
3B
3A
3, 4EN
2B
2A
1B
1A
1, 2EN
13
11
5
3
15
14
9
10
12
7
6
1
2
4
EN
EN
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
logic diagram (positive logic)
2B
2A
1B
1A
1, 2EN
2Y
1Y
3
5
4B
4A
3B
3A
3, 4EN
13
11
3Y
4Y15
14
9
10
12
7
6
1
2
4
schematics of inputs and outputs
TYPICAL OF ALL OUTPUTSEQUIVALENT OF EACH ENABLE INPUTEQUIVALENT OF EACH A OR B INPUT
Output
V
CC
Input
V
CC
V
CC
Input
16.8 k
NOM
960
NOM
8.3 k
NOM
85
NOM
960
NOM