Datasheet

ABSOLUTE MAXIMUM RATINGS
PACKAGE DISSIPATION RATINGS
SN10501
SN10502
SN10503
SLOS408B – MARCH 2003 – REVISED JANUARY 2009 .................................................................................................................................................. www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
operating free-air temperature range unless otherwise
(1)
UNIT
Supply voltage, V
S
16.5 V
Input voltage, V
I
± V
S
Output current, I
O
150 mA
Differential input voltage, V
ID
4 V
Continuous power dissipation See Dissipation Rating Table
Maximum junction temperature, T
J
150 ° C
Maximum junction temperature, continuous operation, longterm reliability, T
J
(2)
125 ° C
Storage temperature range, T
stg
– 65 ° C to 150 ° C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 300 ° C
(1) The absolute maximum ratings under any condition is limited by the constraints of the silicon process. Stresses above these ratings may
cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied.
(2) The maximum junction temperature for continuous operation is limited by package constraints. Operation above this temperature may
result in reduced reliability and/or lifetime of the device.
POWER RATING
(2)
PACKAGE θ
JC
( ° C/W)
(1)
θ
JA
( ° C/W)
T
A
≤ 25 ° C T
A
= 85 ° C
DBV (5) 55 255.4 391 mW 156 mW
D (8) 38.3 97.5 1.02 W 410 mW
D (14) 26.9 66.6 1.5 W 600 mW
DGK (8) 54.2 260 385 mW 154 mW
DGN (8)
(3)
4.7 58.4 1.71 W 685 mW
PWP (14)
(3)
2.07 37.5 2.67 W 1.07 W
(1) This data was taken using the JEDEC standard High-K test PCB.
(2) Power rating is determined with a junction temperature of 125 ° C. This is the point where distortion
starts to substantially increase. Thermal management of the final PCB should strive to keep the
junction temperature at or below 125 ° C for best performance and long term reliability.
(3) The SN10501, SN10502, and SN10503 may incorporate a P owerPAD™ on the underside of the chip.
This acts as a heatsink and must be connected to a thermally dissipating plane for proper power
dissipation. Failure to do so may result in exceeding the maximum junction temperature which could
permanently damage the device. See TI Technical Brief SLMA002 for more information about utilizing
the PowerPAD™ thermally enhanced package.
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