Datasheet

User's Guide
SLVU571–January 2012
SMV512K32-CVAL SRAM Breakout Evaluation Board
This document outlines the basic steps and functions that are required to ensure proper operation of the
SMV512K32-CVAL breakout evaluation board. It works in tandem with a customers’ pattern generation
and capture hardware to demonstrate the memory function features of the 16-Mbit asynchronous SRAM
memory.
Contents
1 Overview ..................................................................................................................... 2
2 Hardware Description ...................................................................................................... 3
3 Device Insertion ............................................................................................................. 4
4 Schematics ................................................................................................................... 4
4.1 Element Schematics ............................................................................................... 4
4.2 Printed-Circuit-Board Layout Schematics ....................................................................... 6
5 EVM Connectors ........................................................................................................... 12
5.1 Description ........................................................................................................ 12
List of Figures
1 SMV512K32-SP Block Diagram .......................................................................................... 2
2 SMV512K32-SP 76-Pin QFP (HFG) Package .......................................................................... 3
3 SMV512K32-CVAL ENPLAS Socket..................................................................................... 3
4 SMV512K32-CVAL Elemental Schematic ............................................................................... 5
5 PCB Layout Layer 1 ........................................................................................................ 6
6 PCB Layout Layer 2 ........................................................................................................ 7
7 PCB Layout Layer 3 ........................................................................................................ 8
8 PCB Layout Layer 4 ........................................................................................................ 9
9 PCB Layout Layer 5....................................................................................................... 10
10 PCB Layout Layer 6....................................................................................................... 11
11 SMV512K32-CVAL........................................................................................................ 12
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SLVU571–January 2012 SMV512K32-CVAL SRAM Breakout Evaluation Board
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