Datasheet

V
IN
V
A
C
1
D
1
D
2
R
1
C
2
3 pF
30 pF
Conversion Phase: Switch Open
Track Phase: Switch Close
SM72442
www.ti.com
SNVS689H OCTOBER 2010REVISED APRIL 2013
ANALOG INPUT
An equivalent circuit for one of the ADC input channels is shown in Figure 9. Diode D1 and D2 provide ESD
protection for the analog inputs. The operating range for the analog inputs is 0V to V
A
. Going beyond this range
will cause the ESD diodes to conduct and result in erratic operation.
The capacitor C1 in Figure 9 has a typical value of 3 pF and is mainly the package pin capacitance. Resistor R1
is the on resistance of the multiplexer and track / hold switch; it is typically 500. Capacitor C2 is the ADC
sampling capacitor; it is typically 30 pF. The ADC will deliver best performance when driven by a low-impedance
source (less than 100). This is specially important when sampling dynamic signals. Also important when
sampling dynamic signals is a band-pass or low-pass filter which reduces harmonic and noise in the input. These
filters are often referred to as anti-aliasing filters.
Figure 9. Equivalent Input Circuit
DIGITAL INPUTS and OUTPUTS
The digital input signals have an operating range of 0V to V
A
, where V
A
= VDDA VSSA. They are not prone to
latch-up and may be asserted before the digital supply V
D
, where V
D
= VDDD VSSD, without any risk. The
digital output signals operating range is controlled by V
D
. The output high voltage is V
D
0.5V (min) while the
output low voltage is 0.4V (max).
SDA and SCL OPEN DRAIN OUTPUT
SCL and SDA output is an open-drain output and does not have internal pull-ups. A “high” level will not be
observed on this pin until pull-up current is provided by some external source, typically a pull-up resistor. Choice
of resistor value depends on many system factors; load capacitance, trace length, etc. A typical value of pull- up
resistor for SM72442 ranges from 2 k to 10 k. For more information, refer to the I2C Bus specification for
selecting the pull-up resistor value . The SCL and SDA outputs can operate while being pulled up to 5V and
3.3V.
I2C CONFIGURATION REGISTERS
The operation of the SM72442 can be configured through its I2C interface. Complete register settings for I2C
lines are shown below.
Table 1. reg0 Register Description
Bits Field Reset Value R/W Bit Field Description
55:40 RSVD 16'h0 R Reserved for future use.
39:30 ADC6 10'h0 R Analog Channel 6 (slew rate detection time constant,
see adc config worksheet)
29:20 ADC4 10'h0 R Analog Channel 4 (iout_max: maximum allowed output
current)
19:10 ADC2 10'h0 R Analog Channel 2 (operating mode, see adc_config
worksheet)
9:0 ADC0 10'h0 R Analog Channel 0 (vout_max: maximum allowed output
voltage)
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