Car Stereo System - Car Radio Digital Signal Processor User Manual

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SM320C6455-EP
FIXED-POINT DIGITAL SIGNAL PROCESSOR
SPRS462B – SEPTEMBER 2007 – REVISED JANUARY 2008
signal processor (DSPs) of the C6000™ DSP family has been designed to perform this
operation for IS2000 and 3GPP wireless standards. This document describes the operation
and programming of the TCP.
SPRUE48 TMS320C645x DSP Universal Test & Operations PHY Interface for ATM 2 (UTOPIA2)
User's Guide. This document describes the universal test and operations PHY interface for
asynchronous transfer mode (ATM) 2 (UTOPIA2) in the C645x digital signal processors
(DSPs) of the C6000™ DSP family.
SPRU972 TMS320C645x DSP Viterbi-Decoder Coprocessor (VCP) User's Guide. Channel
decoding of voice and low bit-rate data channels found in third generation (3G) cellular
standards requires decoding of convolutional encoded data. The Viterbi-decoder
coprocessor 2 (VCP2) provided in C645x devices has been designed to perform
Viterbi-Decoding for IS2000 and 3GPP wireless standards. The VCP2 coprocessor has been
designed to perform forward error correction for 2G and 3G wireless systems. The VCP2
coprocessor offers a very cost effective and synergistic solution when combined with Texas
Instruments (TI) DSPs. The VCP2 can support 1941 12.2 Kbps class A 3G voice channels
running at 333 MHZ. This document describes the operation and programming of the VCP2.
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