Datasheet

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ELECTRICAL CHARACTERISTICS
SLK2721
SLLS532B – JUNE 2002 – REVISED MARCH 2007
over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
TTL
V
IH
High-level input voltage 2 3.6 V
V
IL
Low-level input voltage 0.80 V
I
IH
Input high current V
DD
= MAX, V
IN
= 2 V 40 µ A
I
IL
Input low current V
DD
= MAX, V
IN
= 0.4 V –40 µ A
V
OH
High-level output voltage I
OH
= -1 mA 2.10 2.3 V
V
OL
Low-level output voltage I
OH
= 1 mA 0.25 0.5 V
C
I
Input capacitance 4 pF
LVDS INPUT SIGNALS
V
I
Input voltage 825 1575 mV
V
ID(th)
Input differential threshold voltage 100 mV
C
I
Input capacitance 3 pF
R
I
Input differential impedance On-chip termination 80 100 120 Ω
t
su
Input setup time requirement See Figure 7 300 ps
t
h
Input hold time requirement See Figure 7 300 ps
T
(duty)
Input clock duty cycle 40% 60%
LVDS OUTPUT SIGNALS
V
OD
Output differential voltage 300 800
V
OS
Output common mode voltage 1070 1375
R
L
= 100 ± 1% mV
∆ V
OD
Change VOD between 1 and 0 25
∆ V
OS
Change VOS between 1 and 0 25
I
(SP)
, I
(SN)
, Outputs shorted to ground or shorted
Output short circuit current 24 mA
I
(SPN)
together
I
off
Power-off current V
DD
= 0 V 10 µ A
t
(cq_min)
100
Clock-output time See Figure 6 ps
t
(cq_max)
100
t
r
/t
f
Output transition time 20% to 80% 100 300 ps
Output clock duty cycle 45% 55%
Data output to FRAME_SYNC delay 4 7 Bit times
13
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