Datasheet

6 SERUB-16OVT EVM User’s Guide SNLU109 – July 2012
6. OPERATION
This section describes how to I
2
C instructions between Host and image sensor through
the DS90UB902Q and DS90UB901Q pair function in a camera system application.
Figure 4 shows the configuration of evaluation boards for I
2
C communication with a
Host controller. Note a Host controller requires an I
2
C interface with slave clock
stretching support.
In Camera mode, I
2
C transactions originate from the Master controller at the
Deserializer side (Figure 4). The I
2
C slave core in the Deserializer will detect if a
transaction is intended for the Serializer or the camera sensor (slave device) at the
Serializer. Commands are sent over the bidirectional control channel to initiate the
transactions. The Serializer will receive the command and generate an I
2
C transaction
on its local I
2
C bus. At the same time, the Serializer will capture the response on the
I
2
C bus and return the response on the high speed forward channel. The Deserializer
parses the response and passes the appropriate response onto the Deserializer I
2
C
bus.
Figure 4. Typical System Block Diagram
Operation