Datasheet
DS90UR916Q
SNOSB46E –MARCH 2011–REVISED APRIL 2013
www.ti.com
Table 10. DESERIALIZER — Serial Bus Control Registers (continued)
ADD ADD Default
PAGE Register Name Bit(s) R/W Function Description
(dec) (hex) (bin)
0 3 3 Des Features 2 7:5 R/W 000 EQ Gain 000: ~1.625 dB
001: ~3.25 dB
010: ~4.87 dB
011: ~6.5 dB
100: ~8.125 dB
101: ~9.75 dB
110: ~11.375 dB
111: ~13 dB
4 R/W 0 EQ Enable 0: EQ = disabled
1: EQ = enabled
3:0 R/W 0000 SSC IF LF_MODE = 0, then:
000: SSCG OFF
0001: fdev = ±0.5%, fmod = PCLK/2168
0010: fdev = ±1.0%, fmod = PCLK/2168
0011: fdev = ±1.5%, fmod = PCLK/2168
0100: fdev = ±2.0%, fmod = PCLK/2168
0101: fdev = ±0.5%, fmod = PCLK/1300
0110: fdev = ±1.0%, fmod = PCLK/1300
0111: fdev = ±1.5%, fmod = PCLK/1300
1000: fdev = ±2.0%, fmod = PCLK/1300
1001: fdev = ±0.5%, fmod = PCLK/868
1010: fdev = ±1.0%, fmod = PCLK/868
1011: fdev = ±1.5%, fmod = PCLK/868
1100: fdev = ±2.0%, fmod = PCLK/868
1101: fdev = ±0.5%, fmod = PCLK/650
1110: fdev = ±1.0%, fmod = PCLK/650
1111: fdev = ±1.5%, fmod = PCLK/650
IF LF_MODE = 1, then:
000: SSCG OFF
0001: fdev = ±0.5%, fmod = PCLK/620
0010: fdev = ±1.0%, fmod = PCLK/620
0011: fdev = ±1.5%, fmod = PCLK/620
0100: fdev = ±2.0%, fmod = PCLK/620
0101: fdev = ±0.5%, fmod = PCLK/370
0110: fdev = ±1.0%, fmod = PCLK/370
0111: fdev = ±1.5%, fmod = PCLK/370
1000: fdev = ±2.0%, fmod = PCLK/370
1001: fdev = ±0.5%, fmod = PCLK/258
1010: fdev = ±1.0%, fmod = PCLK/258
1011: fdev = ±1.5%, fmod = PCLK/258
1100: fdev = ±2.0%, fmod = PCLK/258
1101: fdev = ±0.5%, fmod = PCLK/192
1110: fdev = ±1.0%, fmod = PCLK/192
1111: fdev = ±1.5%, fmod = PCLK/192
0 4 4 CMLOUT Config 7 R/W 0 Repeater Enable 0: Output CMLOUTP/N = disabled
1: Output CMLOUTP/N = enabled
6:0 R/W 0000000 Reserved Reserved
0 21 15 FRC 7 R/W 0 Timing mode Select display timing mode
Configuration select 0: DE only mode
1: Sync mode (VS, HS)
6 R/W 0 VS Polarity 0: Active HIGH
1: Active LOW
5 R/W 0 HS Polarity 0: Active HIGH
1: Active LOW
4 R/W 0 DE Polarity 0: Active HIGH
1: Active LOW
3 R/W 0 FRC2 enable 0: FRC2 disabled
1: FRC2 enabled
2 R/W 0 FRC1 enable 0: FRC1 disabled
1: FRC1 enabled
[1:0] 0 Reserved Reserved
32 Submit Documentation Feedback Copyright © 2011–2013, Texas Instruments Incorporated
Product Folder Links: DS90UR916Q