Datasheet

1/2 V
DDIO
GND
V
DDIO
GND
V
DDIO
t
ROS
t
ROH
PCLK
w/ RFB = H
RGB[n],
VS, HS, DE
1/2 V
DDIO
1/2 V
DDIO
1/2 V
DDIO
GND
V
DDIO
GND
V
DDIO
t
ROS
t
ROH
PCLK
w/ RFB = H
RGB[n],
VS, HS, DE
1/2 V
DDIO
RIN
(Diff.)
Z or L or PU
Z or L
Z or L
TRI-STATE or LOW or Pulled Up
TRI-STATE or LOW
RGB[7:0],
HS, VS, DE
PCLK
(RFB = L)
TRI-STATE
or LOW
LOCK
'RQ¶W&DUH
t
RxZ
t
DDLT
PDB
2.0V
0.8V
IN LOCK TIMEOFF ACTIVE OFF
DS90UR916Q
www.ti.com SNOSB46E –MARCH 2011–REVISED APRIL 2013
Figure 8. Deserializer PLL Lock Times and PDB TRI-STATE Delay
(1)
Note: (1) When the Serializer output is at TRI-STATE the Deserializer will lose PLL lock. Resynchronization / Relock must occur before data transfer require
t
PLD
Figure 9. Deserializer Output Data Valid (Setup and Hold) Times with SSCG = Off
Figure 10. Deserializer Output Data Valid (Setup and Hold) Times with SSCG = On
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