Datasheet

2 SERDESUB-16USB User’s Guide SNLU100 – April 2012

Introduction:

Texas Instruments’ Automotive Serdes DS90UB901Q/902Q FPD-Link III evaluation kit

contains one (1) DS90UB901Q Serializer board, one (1) DS90UB902Q Deserializer board,

and one (1) two (2) meter* high speed USB 2.0 cable. *Note: the chipset can support up

to ten (10) meters.

The DS90UB901Q/902Q chipset supports a variety of automotive vision applications over

a two (2) wire serial stream. The single differential pair (FPD-Link III) is well-suited for

direct connections between camera systems and Host Controller/Electronic Control Unit

(ECU)/FPGA. The bidirectional control channel of the DS90UB901Q/902Q provides

seamless communication between the image sensor and ECU/FPGA. Other typical

automotive vision systems may include: rear view, side view camera, lane departure

warning, parking assistance, blind spot view, etc.

This kit will demonstrate the functionality and operation of the DS90UB901Q and

DS90UB902Q chipset. The chipset enables transmission of a high-speed video data along

with a low latency bi-directional control bus over a single twisted pair cable. The integrated

control channel transfers data bi-directionally over the same serial video link. The transport

delivers 16 bits of parallel data together with bidirectional control channel that supports an

C bus. Additionally, there are six user-configurable GPIO (General Purpose IO) for

sending control data. This interface allows transparent full-duplex communication over a

single high-speed differential pair, carrying asymmetrical bi-directional control information

without the dependency of video blanking intervals. The Serializer and Deserializer chipset

is designed to transmit data at PCLK clocks speeds ranging from 10 to 43 MHz and I

bus rates up to 100 kbps at up to 10 meters cable length over -40 to +105 Deg C.

The Serializer board accepts 1.8V/3.3V parallel input signals. FPD-Link III Serializer

converts the 1.8V/3.3V LVCMOS parallel lines into a single serialized data pair with an

embedded clock. The serial data line rate switches at 28 times the base clock frequency.

With an input clock at 43 MHz, the transmission line rate for the FPD-Link III is 1.20Gbps

(28 x 43MHz).

The user needs to provide the proper 1.8V/3.3V LVCMOS inputs and 1.8V/3.3V LVCMOS

clock to the Serializer and also provide a proper interface from the Deserializer output to

test equipment. The Serializer and Deserializer boards can also be used to evaluate

device parameters. A cable conversion board or harness scramble may be necessary

depending on type of cable/connector interface used on the input to the DS90UB901Q and

to the output of the DS90UB902Q.

The demo boards are not intended for EMI testing. The demo boards were designed

for easy accessibility to device pins with tap points for monitoring or applying

signals, additional pads for termination, and multiple connector options.