Datasheet

SNLU100 – April 2012 SERDESUB-16USB User’s Guide 13
DS9UB902Q Deserializer Board Description:
The USB connector J2 (mini USB) on the topside of the board provides the interface
connection for FPD-Link III signals to the Serializer board. Note: J11 (mini USB) on the
bottom side is un-stuffed and not used with the cable provided in the kit.
The Deserializer board is powered externally from the J4 (VDD) and J5 (VSS) connectors
shown below. For the Deserializer to be operational, the S1 switch – PDB must be set
HIGH. S1-RES0, BISTEN (Normal mode) must be set LOW. Master or slave mode is user
selected on S1-M_S (MODE)..
The 2x17 pin IDC Connector J7 provides access to the 16 bit 1.8V or 3.3V LVCMOS and
PCLK clock outputs.
f J4
,
J5
,
JP1
c J11 (BACKSIDE)
(UNSTUFFED)
c FPD-Link III I/O
d LVCMOS OUTPUTS
e FUNCTION CONTROLS
f
POWER SUPPLY
g I2C BUS CONTROL
h GPIO
d P1
e S1
d JP4
c J2
(
TOPSIDE
)
Note:
Connect cable
(mini USB side) to J2
on
(
TOPSIDE
)
.
d JP5
1.8V
g JP8, JP9, J8
h J7
Note:
1) VDD and VSS MUST
be
applied externally from
here.
2) VDDI = 3.3V should be
applied separately on JP1
with default jumper on JP2
(VDDI=+3.3V),
otherwise jumper VDDIO
to +1.8V