Datasheet

R[7:0]

G[7:0]

B[7:0]

V, H, DE

PCLK

HOST

GPU

XGA

24-bit RGB Display

Up to 10m TWP

Cable

FPD-Link II SER

FPD-Link ll DES

Streaming RGB Display Applications

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5 Streaming RGB Display Applications

The FPD-Link II chipset is mainly used for RGB applications with various display resolutions. With the

basic chipset (DS90UR241/124), 18-bit color depth is commonly used. A wide range of PCLK rates are

supported depending upon the chipset selected. Of the user data payload, that is, the 24 data bits, 18 bits

of RGB information, 3 display control signals (HS, VS, DE) and 3 general purpose signals are sent per

PCLK.

Figure 3. 24-bit RGB FPD-Link II SERDES XGA Display Application

In this example, if the PCLK was at 43 MHz, the serial transmission rate is 28 times the PCLK, or

1.2 Gbps. The user data rate is 24X of PCLK, or 1.0 Gbps in this example.

6 Signal Quality Enhancers

As noted above, the data payload is modified to randomize, scramble, and balance the data to support

AC-coupling of the interface and to also enhance the signal quality of the serial signal. In addition to these,

the physical layer is also enhanced and allows for various options depending upon the chipset.

Certain FPD-Link II line drivers feature an adjustable Pre-Emphasis feature. This is useful with longer

distance applications or with high-loss interconnects. A resistor is connected to the PRE pin to ground and

the value sets the amount of additional output current that is driven. If the following logic bit is the same

logic state, the “additional” current is turned off for the following bit. With this scheme, ISI (jitter) is reduced

and also some power is saved.

Other FPD-Link II line drivers provide De-Emphasis. Similar to Pre-Emphasis, this feature is adjustable via

an external resistor. A serial control bus provides another means to adjust a programmable register

setting. De-Emphasis reduces the differential output swing after the initial data transition, thus minimizing

ISI.

Certain FPD-Link II line drivers also support a differential output voltage magnitude select pin. This pin is

typically set to low for standard swings. But if a larger VOD is desired, the pin allows for an increased

swing setting by setting it High.

Cable equalization is provided by some FPD-Link II receivers. This feature compensates for cable loss.

Adjustment is made via pin control or serial bus controlled registers.

AN-1807 FPD-Link II Display SerDes Overview SNLA102B–May 2008–Revised April 2013

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