SD395EVK National Semiconductor EVK User Manual LMH0395 Evaluation Board User Guide October 20, 2010 Overview The SD395 Evaluation Kit (EVK) enables evaluation of the LMH0395 3G/HD/SD SDI Dual Output Adaptive Cable Equalizer. Evaluation Kit Contents The EVK contains the following parts: • SD395EVK board assembly with the LMH0395 cable equalizer • SD395EVK User Guide Evaluation Board Description Figure 1 shows the SD395 evaluation board and highlights some of its features. FIGURE 1.
SDI Input and SDO Output The SDI input connector (J1) is a 75Ω BNC connector. The SDI input should conform to the SMPTE 424M, SMPTE 292M, or SMPTE 259M standards. The SDO0 and SDO1 output connectors (J2, J3, J4, and J5) are 50Ω SMA connectors. The SDO0 and SDO1 output connectors have onboard 4.7uF AC coupling capacitors (C3, C7, C17, and C18). When using only one side of an output pair, the other side should be terminated with a 50Ω SMA termination.
Pin Mode Controls (JP2 – JP4) JP2, JP3, and JP4 are used to control the ¯¯¯ CD and Mute, Bypass, and Auto Sleep functions while the device is configured in Pin Mode. Do not place jumpers on JP2, JP3, or JP4 while the device is configured for SPI Mode. ¯¯¯ CD and MUTE (JP2) ¯¯¯ ) monitoring and MUTE control. ¯¯¯ JP2 allows Carrier Detect (CD CD is high when no input signal is present.
Typical Performance Equalizer Output Figures 4, 5, and 6 show output waveforms for the SD395 with various Belden 1694A cable lengths. The input signal is a 2.97 Gbps PRBS10, and the output signal is measured on the Agilent DCA-J 86100C oscilloscope. FIGURE 4. SD395 Output Waveform at 2.97 Gbps with 160m Belden 1694A Cable SD395 EVK User Guide Rev 1.0 4 of 8 © 2010, National Semiconductor Corp.
FIGURE 5. SD395 Output Waveform at 1.485 Gbps with 200m Belden 1694A Cable FIGURE 6. SD395 Output Waveform at 270 Mbps with 400m Belden 1694A Cable SD395 EVK User Guide Rev 1.0 5 of 8 © 2010, National Semiconductor Corp.
Input Return Loss Figure 7 shows input return loss of the LMH0395 as measured at the BNC on the SD395. The return loss is measured using the Agilent 8722ES VNA with a 75Ω BNC to 75Ω Type N connector on the input. Note that return loss is layout dependent. SMPTE LIMIT FIGURE 7. SD395 Input Return Loss SD395 EVK User Guide Rev 1.0 6 of 8 © 2010, National Semiconductor Corp.
SD395 Bill of Materials Reference Designator C1, C2, C12 C3, C7, C9, C16, C17, C18 C5, C6 C10, C11 D1 J1 J2, J3, J4, J5 JP1 JP2 JP3, JP4, JP6, JP7, JP8, JP9 JP5, JP10 L1 PST1, PST2 R1 R2, R3 R4 R5, R7, R9 R6, R8, R10 U2 Qty 3 6 2 2 1 1 4 1 1 6 2 1 2 1 2 1 3 3 1 Description Capacitor, 0.01uF, 25V, X7R, 0402 Capacitor, 4.7uF, 6.3V, X5R, 0402 Capacitor, 1uF, 6.3V, X5R, 0402 Capacitor, 0.1uF, 16V, X7R, 0402 LED, Green, 0603 BNC, 75-ohm, Amphenol, edge launch SMA, 50-ohm, edge launch Header, 6x1, 0.
+ 2.5V 0 1 PST1 1 GND JP1 SDI 1 2 3 4 5 6 HDR_6 J1 Z75_1 GND BNC_EDGE SPI Header GND SCK MOSI MISO SS GND VCC PST2 Power_Supply_Terminal LAYOUT NOTE: 2 C11 0.1UF R7 3.16K VCC D1 LED C14 Do Not Load C13 Do Not Load MUTE/SCK 9.76K R6 9.76K R8 C15 Do Not Load VEE/SSb 9.76K R10 GND SPI_Connector_SSb 3.16K R9 GND VCC C12 0.01UF GND MOSI GND SPI_Connector_MOSI 3.16K R5 Z75_n: W=20MIL, ZO=75+/-5% C10 0.1UF SPI_Connector_SCK AUTOSLP/MISO C9 4.
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
