Datasheet

JTAG Instruction Shift (IDLE)
TDO
TCK
TMS
TAP
State
TDI
TRST
JTAG Reset
TLR (Test-Logic-Reset) RTI
SEL
DR
SEL
IR
CAP
IR
SHIFT IR
EX1
IR
UPD
IR
RTI (Run-Test/Idle)
8-bit instruction register capture value (81h)
1 0 0 0 0 0 0 1
MSB
LSB
8-bit instruction register op-code (40h to 47h)
x x x x 0 1 00
SCANSTA476
www.ti.com SNLS171G –JANUARY 2005–REVISED APRIL 2013
Timing Diagrams
Op-codes 40h to 47h select pins A0 to A7 respectively.
Note the JTAG reset preamble places the JTAG TAP controller in a stable state (RTI). Both the instruction and data shifts start in - and return to - the RTI state
Figure 2. Instruction Shift (Channel Select)
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