Datasheet
SCANSTA111
www.ti.com
SNLS060K –AUGUST 2001–REVISED APRIL 2013
Table 4. Level 2 Protocol and Op-Codes (continued)
Instructions Hex Op-Code Binary Op-Code Data Register
TRANSPARENT4 A4 1010 0100 Transparent Enable Register
4
TRANSPARENT5 A5 1010 0101 Transparent Enable Register
5
TRANSPARENT6 A6 1010 0110 Transparent Enable Register
6
TRANSPARENT7 A7 1010 0111 Transparent Enable Register
7
DGPIO
0
B0 1011 0000 Dedicated GPIO Register
0
DGPIO
1
B1 1011 0001 Dedicated GPIO Register
1
DGPIO
2
B2 1011 0010 Dedicated GPIO Register
2
DGPIO
3
B3 1011 0011 Dedicated GPIO Register
3
DGPIO
4
B4 1011 0100 Dedicated GPIO Register
4
DGPIO
5
B5 1011 0101 Dedicated GPIO Register
5
DGPIO
6
B6 1011 0110 Dedicated GPIO Register
6
DGPIO
7
B7 1011 0111 Dedicated GPIO Register
7
SGPIO
0
B8 1011 1000 Shared GPIO Register
0
SGPIO
1
B9 1011 1001 Shared GPIO Register
1
SGPIO
2
BA 1011 1010 Shared GPIO Register
2
SGPIO
3
BB 1011 1011 Shared GPIO Register
3
SGPIO
4
BC 1011 1100 Shared GPIO Register
4
SGPIO
5
BD 1011 1101 Shared GPIO Register
5
SGPIO
6
BE 1011 1110 Shared GPIO Register
6
SGPIO
7
BF 1011 1111 Shared GPIO Register
7
Other Undefined TBD TBD Device Identification Register
LEVEL 2 INSTRUCTION DESCRIPTIONS:
BYPASS: The BYPASS instruction selects the bypass register for insertion into the active scan chain when the
'STA111 is selected.
EXTEST: The EXTEST instruction selects the boundary-scan register for insertion into the active scan chain.
The boundary-scan register consists of seven sample only shift cells connected to the S
(0-6)
and OE inputs. On
the 'STA111, the EXTEST instruction performs the same function as the SAMPLE/PRELOAD instruction, since
there aren't any scannable outputs on the device.
SAMPLE/PRELOAD: The SAMPLE/PRELOAD instruction selects the boundary-scan register for insertion into
the active scan chain. The boundary-scan register consists of seven sample only shift cells connected to the S
(0-
6)
and OE inputs.
IDCODE: The IDCODE instruction selects the device identification register for insertion into the active scan
chain. When IDCODE is the current active instruction the device identification 0FC0F01F Hex is captured upon
exiting the Capture-DR state.
UNPARK: This instruction unparks the Local Scan Port Network and inserts it into the active scan chain as
configured by Mode Register
0
(and Mode Register
1
in the HDL) (see Table 6). Unparked LSPs are sequenced
synchronously with the 'STA111's TAP controller. When a LSP has been parked in the Test-Logic-Reset or Run-
Test/Idle state, it will not become unparked until the 'STA111's TAP Controller enters the Run-Test/Idle state
following the UNPARK instruction. An LSP which has been parked in Test-Logic-Reset will be parked in Run-
Test/Idle upon update of an UNPARK instruction. If an LSP has been parked in one of the stable pause states
(Pause-DR or Pause-IR), it will not become unparked until the 'STA111's TAP Controller enters the respective
pause state. (See Figure 9 through Figure 12).
PARKTLR: This instruction causes all unparked LSPs to be parked in the Test-Logic-Reset TAP controller state
and removes the LSP network from the active scan chain. The LSP controllers keep the LSPs parked in the
Test-Logic-Reset state by forcing their respective TMS
n
output with a constant logic 1 while the LSP controller is
in the Parked-TLR state (see Figure 4).
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