Datasheet

TMS570LS20216, TMS570LS20206, TMS570LS10216
TMS570LS10206, TMS570LS10116, TMS570LS10106
www.ti.com SPNS141F–AUGUST 2010– REVISED JULY 2011
7.18.5 MibADC Timings
Table 7-30. MibADC Timings
Min NOm MAX Unit
t
c(ADCLK)
Cycle time, MibADC clock 33 ns
t
d(SH)
Delay time, sample and hold time 200 ns
t
d©)
Delay time, conversion time 400 ns
t
d(SHC)
(1)
Delay time, total sample/hold and conversion time 600 ns
(1) This is the minimum sample/hold and conversion time that can be achieved. These parameters are dependent on many factors, e.g the
prescale settings.
Copyright © 2010–2011, Texas Instruments Incorporated Peripheral and Electrical Specifications 97
Submit Documentation Feedback
focus.ti.com: TMS570LS20216 TMS570LS20206 TMS570LS10216 TMS570LS10206 TMS570LS10116
TMS570LS10106