Datasheet

SPISIMO Data
Must Be Valid
SPISOMI Data Is Valid
SPISOMI
SPISIMO
SPICLK
(clock polarity = 1)
SPICLK
(clock polarity = 0)
7
2
1
3
5
4
6
SPICLK
(clock polarity = 0)
SPICSn
SPICLK
(clock polarity = 1)
SPIENAn
8
9
TMS570LS20216, TMS570LS20206, TMS570LS10216
TMS570LS10206, TMS570LS10116, TMS570LS10106
www.ti.com SPNS141F–AUGUST 2010– REVISED JULY 2011
Figure 7-13. SPI Slave Mode External Timing (CLOCK PHASE = 0)
Figure 7-14. SPI Slave Mode Enable Timing (CLOCK PHASE = 0)
Copyright © 2010–2011, Texas Instruments Incorporated Peripheral and Electrical Specifications 83
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