Datasheet

TMS570LS20216, TMS570LS20206, TMS570LS10216
TMS570LS10206, TMS570LS10116, TMS570LS10106
www.ti.com SPNS141F–AUGUST 2010– REVISED JULY 2011
7.8 Flash Timings
Table 7-12. Timing Requirements For Program Flash
MIN NOM MAX Unit
t
prog(32-bit)
Full word (32-bit) programming time 33 300 µs
t
prog(Total)
2M-byte programming -40°C to 125°C 17 74 s
time
(1)
0°C to 60°C, for first 25 17 25 s
cycles
t
prog ECC(16-bit)
ECC programming time 33 300 µs
t
prog ECC(total)
Total ECC bit -40°C to 125°C 4.3 15 s
programming time
0°C to 60°C, for first 25 4.3 7 s
(256k-byte)
cycles
t
erase(sector)
Sector erase time -40°C to 125°C 2 15 s
(including compaction)
0°C to 60°C, for first 25 1.5 10 s
cycles
t
erase(bank)
Bank erase time (including Bank 0 7.5 20 s
compaction),0°C to 60°C,
Bank 1 5.5 12 s
for first 25 cycles
Bank 2 5.5 12 s
Bank 3 5.5 12 s
t
wec
Write/erase cycles at T
A
= -40 to 125°C with 15 year 1000 cycles
Data Retention requirement
(2)
(1) This programming time includes overhead of state machine, but does not include data transfer time.
(2) Flash write/erase cycles and data retention specifications are based on a validated implementation of the TI flash API. Non-TI flash API
implementation is not supported. For detailed description see the F035 Flash Validation Procedure (SPNA127).
Copyright © 2010–2011, Texas Instruments Incorporated Peripheral and Electrical Specifications 77
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