Datasheet

guaranteed fail
lower-
threshold
guaranteed pass
upper-
threshold
guaranteed fail
f[MHz]
1.5 5.0 20.0 50.0
TMS570LS20216, TMS570LS20206, TMS570LS10216
TMS570LS10206, TMS570LS10116, TMS570LS10106
SPNS141F–AUGUST 2010– REVISED JULY 2011 www.ti.com
7.1.4 LPO And Clock Detection
The LPOCLKDET module consists of a clock monitor (CLKDET) and 2 low power oscillators (LPO) - a low
frequency (LF) and a high frequency (HF) oscillator. The CLKDET is a supervisor circuit for an externally
supplied clock signal. In case the externally supplied clock frequency falls out of a frequency window, the
clock detector flags this condition and switches to the HF LPO clock (limp mode). The OSCFAIL flag and
clock switch-over remain, regardless of the behavior of the oscillator clock signal. The only way OSCFAIL
can be cleared (and re-enable OSCIN as the clock source) is a power-on-reset.
Table 7-3. LPO And Clock Detection
Parameter MIN Type MAX Unit
Invalid frequency lower threshold 1.5 5 MHz
upper threshold 20 50 MHz
Limp mode frequency (HFosc) 7.9 10 14.4 MHz
HFosc frequency 7.9 10 14.4 MHz
LFosc frequency 62 80 113 kHz
Figure 7-2. LPO And Clock Detection
68 Peripheral and Electrical Specifications Copyright © 2010–2011, Texas Instruments Incorporated
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