Datasheet
TMS570LS20216, TMS570LS20206, TMS570LS10216
TMS570LS10206, TMS570LS10116, TMS570LS10106
www.ti.com
SPNS141F–AUGUST 2010– REVISED JULY 2011
Electrical Characteristics Over Operating Free-Air Temperature Range
(1)
(continued)
Parameter Test Conditions MIN TYP MAX Unit
I
CC
(3)
V
CC
Digital All packages HCLK = 100MHz, VCLK = 100MHz 350 mA
supply current
HCLK = 140MHz, VCLK= 70MHz 390 mA
(Operating
BGA packages HCLK = 160MHz, VCLK = 80MHz 430 mA
mode)
V
CC
Digital All packages STCCLK = 46.666MHz Peak 510 mA
supply current
STCCLK = 50.0MHz Peak 540 mA
(CPU selftest
BGA packages STCCLK = 53.333MHz Peak 580 mA
mode:
LBIST)
(4)(5)
V
CC
Digital All packages HCLK=80MHz, Peak 340 mA
supply current VCLK=40MHz
(Mem selftest
HCLK=100MHz, Peak 430 mA
mode:
VLCK=100MHz
PBIST)
(4)(6)
V
CC
Digital supply current (doze mode) OSCIN = 6 MHz, V
CC
= 1.65 V
(7)
35 mA
V
CC
Digital supply current (snooze mode) All frequencies, V
CC
= 1.65 V
(7)
30 mA
V
CC
Digital supply current (sleep mode) All frequencies, V
CC
= 1.65 V
(7)
25 mA
I
CCIO
V
CCIO
Digital supply current (operating No DC load, V
CCIO
= 3.6 V
(8)
15 mA
mode)
V
CCIO
Digital supply current (doze mode) No DC load, V
CCIO
= 3.6 V
(8)
700 µA
V
CCIO
Digital supply current (snooze No DC load, V
CCIO
= 3.6 V
(8)
100 µA
mode)
V
CCIO
Digital supply current (sleep mode) No DC load, V
CCIO
= 3.6 V
(8)
100 µA
I
CCAD
V
CCAD
supply current (operating mode) All frequencies, V
CCAD
= 3.6 V 30 mA
V
CCAD
supply current (doze mode) All frequencies, V
CCAD
= 3.6 V
(7)
200 µA
V
CCAD
supply current (snooze mode) All frequencies, V
CCAD
= 3.6 V
(7)
200 µA
V
CCAD
supply current (sleep mode) All frequencies, V
CCAD
= 3.6 V
(7)
200 µA
I
CCP
V
CCP
pump supply current V
CCP
= 3.6 V read operation 25 mA
V
CCP
= 3.6 V program
(9)
90 mA
V
CCP
= 3.6 V erase 90 mA
V
CCP
= 3.6 V doze mode
(10)
5 µA
V
CCP
= 3.6 V snooze mode
(10)
5 µA
V
CCP
= 3.6 V sleep mode
(10)
5 µA
C
I
Input 2 pF
capacitance
(11)
C
O
Output 3 pF
capacitance
(3) Typical values are at V
cc
=1.5V and maximum values are at V
cc
=1.65V
(4) The peak current is measured on the TI EVM board with two 10µF and thirteen 100nF capacitors on VCC domain. Running at a lower
frequency consumes less current.
(5) LBIST currents specified are for execution of LBIST with a certain STC clock. Lower current consumption can be achieved by
configuring a slower STC Clock frequency. The current peak duration can last for the duration of 1 LBIST test interval.
(6) PBIST currents specified are for execution of PBIST on all RAMs(Group 1- 14) and all the algrithms. Lower current consumption can be
achieved by configuring a slower HCLK frequency. Different algorithms consume different current. For more information, please refer to
Basic PBIST Configuration and influence on current consumption (SPNA128).
(7) For Flash banks/pumps in sleep mode.
(8) I/O pins configured as inputs or outputs with no load. All pulldown inputs ≤ 0.2 V. All pullup inputs ≥ V
CCIO
- 0.2 V.
(9) This assumes reading from one bank while programming a different bank.
(10) For Flash banks/pumps in sleep mode.
(11) The maximum input capacitance C
I
of the FlexRay RX pin(s) is 10pF.
Copyright © 2010–2011, Texas Instruments Incorporated Device Electrical Specifications 65
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