Datasheet

TMS570LS20216, TMS570LS20206, TMS570LS10216
TMS570LS10206, TMS570LS10116, TMS570LS10106
www.ti.com SPNS141F–AUGUST 2010– REVISED JULY 2011
Table 4-10. MIBSPI5 Event Trigger Sources
Event TGxCTRL TRIGSRC[3:0] Hookup
Disabled 0000 No trigger source
EVENT0 0001 GIOA[0]
EVENT1 0010 GIOA[1]
EVENT2 0011 GIOA[2]
EVENT3 0100 GIOA[3]
EVENT4 0101 GIOA[4]
EVENT5 0110 GIOA[5]
EVENT6 0111 GIOA[6]
EVENT7 1000 GIOA[7]
EVENT8 1001 NHET[8]
EVENT9 1010 NHET[10]
EVENT10 1011 NHET[12]
EVENT11 1100 NHET[14]
EVENT12 1101 NHET[16]
EVENT13 1110 NHET[18]
EVENT14 1111 Internal Tick counter
4.6.2 MIBSPIP5/DMM Pin Multiplexing
The multiplexing of MIBSPIP5 and DMM pins are controlled by the status of the MIBSPIP5 module and
the DMM module. The pins will have DMM functionality if the DMM module is enabled and the MIBSPIP5
module is disabled; if the MIBSPIP5 is enabled the pins will have MIBSPI functionality, regardless of the
DMM module status. DMMCLK, DMMSYNC, DMMENA and DMMDATA[1:0] are always functional
independent of the MIBSPIP5 configuration because they are not multiplexed. The related pin numbers
can be found in the MIBSPI5 and the DMM section of the Terminal Functions chapter. The following table
shows the MIBSPI5 and DMM Data pin multiplexing.
Table 4-11. MIBSPIP5 Pin Multiplexing
MIBSPIP5 enabled DMM enabled &MIBSPIP5 disabled
MIBSPI5CLK DMMDATA[4]
MIBSPI5CS[0] DMMDATA[5]
MIBSPI5CS[1] DMMDATA[6]
MIBSPI5CS[2] DMMDATA[2]
MIBSPI5CS[3] DMMDATA[3]
MIBSPI5ENA DMMDATA[7]
MIBSPI5SIMO[0] DMMDATA[8]
MIBSPI5SIMO[1] DMMDATA[9]
MIBSPI5SIMO[2] DMMDATA[10]
MIBSPI5SIMO[3] DMMDATA[11]
MIBSPI5SOMI[0] DMMDATA[12]
MIBSPI5SOMI[1] DMMDATA[13]
MIBSPI5SOMI[2] DMMDATA[14]
MIBSPI5SOMI[3] DMMDATA[15]
Copyright © 2010–2011, Texas Instruments Incorporated Peripherals 49
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