Datasheet

TMS570LS20216, TMS570LS20206, TMS570LS10216
TMS570LS10206, TMS570LS10116, TMS570LS10106
SPNS141F–AUGUST 2010– REVISED JULY 2011 www.ti.com
2.5 Terminal Functions
This following table describes the pins on the device.
NOTE
Table Abbreviations: PWR = power, GND = ground, REF = reference voltage, NC = no
connect, IPD = Internal Pull Down, IPU = Internal Pull Up, I/O = Input/Output, I = Input, O =
Output
Table 2-9. Terminal Functions
Terminal
Internal
TMS570LSXXX16 TMS570LSXXX06 Type pullup/p Description
Name
ulldown
337 144 337 144
HIGH-END TIMER (NHET)
NHET[0] K18 105 K18 105 Timer input capture or output compare.
The applicable NHET pins can be
NHET[1] V2 42 V2 42
programmed as general-purpose
NHET[2] W5 56 W5 56
input/output (GIO) pins. NHET pins are
high-resolution.
NHET[3] U1 41 U1 41
The high-resolution (HR) SHARE feature
NHET[4] B12 121 B12 121
allows even HR pins to share the next
higher odd HR pin structures. The next
NHET[5] V6 44 V6 44
higher odd HR pin structure is always
NHET[6] W3 48 W3 48
implemented, even if the next higher odd
HR pad and/or pin itself is not. The HR
NHET[7] T1 109 T1 109
sharing is independent of whether or not
NHET[8] E18 112 E18 112
the odd pin is available externally. If an
odd pin is available externally and
NHET[9] V7 57 V7 57
shared, then the odd pin can only be
NHET[10] D19 116 D19 116
used as a general-purpose I/O.
NHET[0] provides SPI clock when used
NHET[11] E3 117 E3 117
for SPI emulation.
NHET[12] B4 8 B4 8
Each NHET pin is equipped with an input
suppression filter that can be used to
NHET[13] N2 26 N2 26
eliminate the sampling of pulses that are
NHET[14] A11 138 A11 138
smaller than a programmable duration
program
NHET[15] N1 113 N1 113 GIOA[0]/INT[0] is also connected to the
mable
3.3V I/O 2mA - z
NHET Pin Disable input of the NHET
IPD
NHET[16] A4 142 A4 142
module.
(20uA)
NHET[17] A13 A13
NHET pins can be programmed as a
GIO pins when not used as NHET
NHET[18] J1 10 J1 10
functional pins.
NHET[19] B13 B13
NHET[20] P2 45 P2 45
NHET[21] H4 11 H4 11
NHET[22] B3 9 B3 9
NHET[23] J4 12 J4 12
NHET[24] P1 43 P1 43
NHET[25] M3 M3
NHET[26] A14 A14
NHET[27] A9 A9
NHET[28] K19 106 K19 106
NHET[29] A3 A3
NHET[30] B11 137 B11 137
NHET[31] J17 J17
22 Device Overview Copyright © 2010–2011, Texas Instruments Incorporated
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