Datasheet

TMS570LS20216, TMS570LS20206, TMS570LS10216
TMS570LS10206, TMS570LS10116, TMS570LS10106
www.ti.com SPNS141F–AUGUST 2010– REVISED JULY 2011
2.3.3 System Modules Assignment
This table shows the memory map for the Cyclic Redundancy Check (CRC) module, the Cortex™-R4F
CoreSight™ debug module, and the System modules.
Table 2-4. System Modules Assignment
Frame Name Address Range
Frame Start Address Frame Ending Address
CRC 0xFE00_0000 0xFEFF_FFFF
CoreSight Debug ROM Register 0xFFA0_0000 0xFFA0_0FFF
Cortex-R4F Debug Register 0xFFA0_1000 0xFFA0_1FFF
ETM-R4 Register 0xFFA0_2000 0xFFA0_2FFF
CoreSight TPIU Register 0xFFA0_3000 0xFFA0_3FFF
POM Register 0xFFA0_4000 0xFFA0_4FFF
DMA RAM 0xFFF8_0000 0xFFF8_0FFF
VIM RAM 0xFFF8_2000 0xFFF8_2FFF
RTP RAM 0xFFF8_3000 0xFFF8_3FFF
Flash Wrapper Register 0xFFF8_7000 0xFFF8_7FFF
PCR Register 0xFFFF_E000 0xFFFF_E0FF
FlexRay PLL/STC CLK Register 0xFFFF_E100 0xFFFF_E1FF
PBIST Register 0xFFFF_E400 0xFFFF_E5FF
STC Register 0xFFFF_E600 0xFFFF_E6FF
EMIF Register 0xFFFF_E800 0xFFFF_E8FF
DMA Register 0xFFFF_F000 0xFFFF_F3FF
ESM Register 0xFFFF_F500 0xFFFF_F5FF
CCMR4 Register 0xFFFF_F600 0xFFFF_F6FF
DMM Register 0xFFFF_F700 0xFFFF_F7FF
RAM ECC even Register 0xFFFF_F800 0xFFFF_F8FF
RAM ECC odd Register 0xFFFF_F900 0xFFFF_F9FF
RTP Register 0xFFFF_FA00 0xFFFF_FAFF
RTI Register 0xFFFF_FC00 0xFFFF_FCFF
VIM Parity Register 0xFFFF_FD00 0xFFFF_FDFF
VIM Register 0xFFFF_FE00 0xFFFF_FEFF
System Register 0xFFFF_FF00 0xFFFF_FFFF
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