Datasheet
R
T
R
T
A
B
D
DE
R
RE
D
R
Vcc
R
FS
R
FS
A
B
D
DE
R
RE
POLCOR
D
R
A B
DDER
POLCOR
D
R
RE
A B
DDER
POLCOR
D
R
RE
Master
SN65HVD82
Slave
SN65HVD888
Slave
SN65HVD888
Slave
SN65HVD888
Cross-wire
fault
0
Overview
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1 Overview
TI RS-485 half-duplex devices in the 8-pin SOIC package have robust drivers and receivers in a small
package for demanding industrial applications. The bus pins are robust to ESD events, with high levels of
protection to Human-Body Model and IEC Contact Discharge specifications. These devices each combine
a differential driver and a differential receiver, which operate from a single power supply. The driver
differential outputs and the receiver differential inputs are connected internally to form a bus port suitable
for half-duplex (two-wire bus) communication, and all feature a wide common-mode voltage range making
the devices suitable for multi-point applications over long cable runs. TI's RS-485 devices are
characterized for industrial applications.
NOTE: This EVM comes without a transceiver soldered on to the board. The user can order any TI
half-duplex, 8-pin SOIC RS-485 transceiver and solder it down on the board for evaluation.
The EVM Tools Folder contains links to devices that work with this EVM. See
http://www.ti.com/tool/rs485-hf-dplx-evm for more information.
Using the SN65HVD888 with Bus Polarity Correction Feature
This EVM can support the SN65HVD888 half-duplex RS-485 transceiver with bus polarity correction (See
Figure 1). The SN65HVD888 transceiver corrects a wrong bus signal polarity caused by a cross-wire fault.
In order to detect the bus polarity all three of the following conditions must be met:
• a failsafe biasing network must be implemented (at the master node) to set logic reference and define
the signal polarity of the bus,
• a slave node must have its receiver enabled and its driver disabled (RE = DE = Low),
• the bus must be idling for the failsafe time, t
FS-max
.
After the failsafe time has passed, the polarity correction is complete and is applied to both, receive and
transmit channels. The status of the bus polarity is latched within the transceiver and maintained for
subsequent data transmissions.
Note: Data streams of consecutive 0’s or 1’s with durations exceeding t
FS-min
can accidently trigger a wrong
polarity correction and must be avoided.
Figure 1. Typical Applications Diagram
2
RS-485 Half-Duplex Evaluation Module SLLU173B–October 2012–Revised June 2013
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