Datasheet

REG104
9
SBVS025G
0 2 4 6 8 10 12 14 16
100
10
1
0.1
0.01
0.001
Enable Current (µA)
Enable Voltage
FIGURE 4. Enable Pin Current versus Applied Voltage.
The Enable Pin Current versus Applied Voltage relationship
is shown in Figure 4. When the Enable pin is connected to
V
IN
greater than 10V, a series resistor may be used to limit
the current.
FIGURE 5. Block Diagram.
FIGURE 6. Output Noise versus Noise Reduction Capacitor.
Since the value of V
REF
is 1.295V, this relationship reduces to:
V
V
V
V
N
RMS
OUT
=
µ
•35
Connecting a capacitor, C
NR
, from the Noise-Reduction (NR)
pin to ground can reduce the output noise voltage. Adding
C
NR
, as shown in Figure 5, forms a low-pass filter for the
voltage reference. For C
NR
= 10nF, the total noise in the
10Hz to 100kHz bandwidth is reduced by approximately
a factor of 3.5. This noise reduction effect is shown in
Figure 6.
Over Current
Over Temp
Protection
V
REF
(1.295V)
Low Noise
Charge Pump
DMOS
Output
R
1
NOTE: R
1
and R
2
are internal
on fixed output versions.
V
OUT
Adj
(Adjustable
Versions)
R
2
NR
(fixed output
versions only)
Enable
REG104
V
IN
C
NR
(optional)
0.001 0.01 0.1 1
45
35
25
Output Noise Voltage
(µV
RMS
10Hz - 100kHz)
C
NR
(µF)
C
OUT
= 0
C
OUT
= 10µF
REG104-3.3
OUTPUT NOISE
A precision band-gap reference is used for the internal
reference voltage, V
REF
, for the REG104. This reference is
the dominant noise source within the REG104. It generates
approximately 45µV
RMS
in the 10Hz to 100kHz bandwidth at
the reference output. The regulator control loop gains up the
reference noise, so that the noise voltage of the regulator is
approximately given by:
VV
RR
R
V
V
V
N
RMS RMS
OUT
REF
=µ
+
=µ •45
2
45
12
The REG104 adjustable version does not have the noise-
reduction pin available, however, the adjust pin is the
summing junction of the error amplifier. A capacitor, C
FB
,