Datasheet
||
3 2 3
REF
DIFF REF IN
2 3 1
R R R
V
V A1+ A1 V V
R R R 2
§ ·
§ ·
¨ ¸
¨ ¸
© ¹
© ¹
2
2 2 2 2
5
2 2 2
R R R R
R
R R 2 R 2
§ ·
¨ ¸
© ¹
3
REF
REF
2 3
R
V
A1 V
2 R R
§ ·
¨ ¸
© ¹
7 REF
REF
6 7
R V
A1 V
R R 2
§ ·
¨ ¸
© ¹
||
3 2 3
REF IN
2 3 1
R R R
A1 V V
R R R
§ ·
§ ·
¨ ¸
¨ ¸
© ¹
© ¹
REF3312
,
REF3318
,
REF3320
,
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,
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,
REF3333
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SBOS392D –AUGUST 2007–REVISED JUNE 2014
Typical Applications (continued)
10.2.1.1 Design Requirements
The design requirements are as follows:
• Supply voltage: 3.3 V
• Maximum input voltage: ±6 V
• Specified input voltage: ±5 V
• ADC reference voltage: 1.25 V
10.2.1.2 Detailed Design Procedure
Figure 19 depicts a simplified schematic for this design showing the MSP430 ADC inputs and full input
conditioning circuitry. The ADC is configured for a bipolar measurement where final conversion result is the
differential voltage, V
DIFF
, between the positive and negative ADC inputs, A1+ and A1–. The bipolar, ground-
referenced input signal must be level-shifted and attenuated by the op amp so that the output is biased to V
REF
/
2 and has a differential voltage that is within the ±V
REF
/ 2 input range of the ADC. The transfer function for the
op-amp circuit simplifies to Equation 4.
where
• R
1
= R
4
• R
5
= R
2
|| R
3
(4)
The voltage applied to the negative ADC input, A1–, is based on the resistor divider formed by R6 and R7 and is
set to V
REF
/ 2 by setting R6 equal to R7, as shown in Equation 5.
(5)
10.2.1.2.1 Op Amp Level-Shift Design
The ratio of R
2
, R
3
, and the V
REF
voltage determines the voltage on the output of the op amp when the
differential input is 0 V. Select the components so that V
OUT
is equal to the V
REF
/ 2 voltage when V
IN
is equal to
0 V, as shown in Equation 6.
where
• V
IN
= 0 V
• R
2
= R
3
(6)
Solve for the value of R
5
by setting R
3
equal to R
2
in Equation 4, as shown in Equation 7:
(7)
10.2.1.2.2 Differential Input Attenuator Design
V
DIFF
is the difference between the two inputs, as shown in Equation 8:
(8)
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