Datasheet
www.ti.com
ELECTRICAL CHARACTERISTICS
PTN78000A
SLTS246B–APRIL 2005 – REVISED JANUARY 2006
operating at 25°C free-air temperature, V
I
=12V,V
O
=–5V,I
O
=I
O
(max), C
1
= 100 μF, C
2
=2x4.7μF, C
3
= 100 μF (unless
otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
O
= –15 V 0.1 0.6
(1)
V
O
= –12 V 0.1 0.75
(1)
I
O
Output current T
A
= 85°C, natural convection airflow A
V
O
=–5V 0.1 1.5
(1)
V
O
= –3.3 V 0.1 1.5
(1)
V
O
= –15 V 7 17
(2)
V
O
= –12 V 7 20
(2)
V
I
Input voltage range Over I
O
range V
V
O
=–5V 7 27
(2)
V
O
= –3.3 V 7 28.7
(2)
Set-point voltage tolerance T
A
= 25°C ±2%
(3)
Temperature variation –40°C to 85°C ±0.5%
Line regulation Over V
I
range ±10 mV
V
O
Load regulation Over I
O
range ±10 mV
Total output voltage Includes set point, line, load
±3%
(3)
variation –40 < T
A
< 85°C
Output voltage adjust 7 V ≤ V
I
≤ (32 – |V
O
|) V –15 –3
V
O
Adj V
range
V
I
=12V,R
SET
=100Ω,V
O
= –15 V 83%
V
I
=12V,R
SET
=2kΩ,V
O
= –12 V 84%
η Efficiency
V
I
=12V,R
SET
=28.7kΩ,V
O
= –5 V 82%
V
I
=12V,R
SET
=221kΩ,V
O
= –3.3 V 77%
Output voltage ripple 20-MHz bandwidth 2% V
O
V
(PP)
I
O(LIM)
Current limit threshold ΔV
O
= –50 mV 3.2 A
1A/μs load step from 50% to 100% I
O
max
Transient response Recovery time 200 μs
V
O
over/undershoot 1 %V
O
F
S
Switching frequency Over V
I
and I
O
ranges 440 550 660 kHz
UVLO Undervoltage lockout V
I
increasing 5.5 V
Ceramic 9.4
(4)
μF
C
I
External input capacitance
Nonceramic 100
(4)
μF
Ceramic 200 μF
External output
C
O
Nonceramic 100
(5)
1,000 μF
capacitance
Equivalent series resistance (nonceramic) 14
(6)
mΩ
Per Telcordia SR-332, 50% stress,
MTBF Calculated reliability 8.9
10
6
Hrs
T
A
= 40°C, ground benign
(1) The maximum output current is 1.5 A or the maximum output power is 9 W, whichever is less.
(2) The maximum input voltage is limited and defined to be (32 – |V
O
|) volts.
(3) The set-point voltage tolerance is affected by the tolerance and stability of R
SET
. The stated limit is unconditionally met if R
SET
has a
tolerance of 1% with 100 ppm/°C or better temperature stability.
(4) A 100-μF electrolytic capacitor and two 4.7-μF ceramic capacitors are required across the input (V
I
and GND) for proper operation.
Locate the ceramic capacitance close to the module.
(5) 100 μF of output capacitance is required for proper operation. See the application information for further guidance.
(6) This is the typical ESR for all the electrolytic (nonceramic) capacitance. Use 17 mΩ as the minimum when using maximum ESR values
to calculate.
3