Datasheet

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V
I
Inhibit
GND
GND
V
O
Track
C1
100 F
(Required)
m
R ,1%
(Required)
SET
C2
10 F
Ceramic
m
C3
100 F
(Optional)
m
PTH12050
(TopView)
1
5
2
3
4
6
ABSOLUTE MAXIMUM RATINGS
PTH12050W/L
SLTS214H – MAY 2003 – REVISED OCTOBER 2007
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
STANDARD APPLICATION
A. R
SET
= Required to set the output voltage higher than the minimum value. See the Application Information section for
values.
B. C2 = 10 µF ceramic capacitor. Required for output voltages 3.3 V or higher.
ORDERING INFORMATION
For the most current package and ordering information, see the Package Option Addendum at the end of this datasheet, or see
the TI website at www.ti.com.
Over operating free-air temperatur range unless otherwise noted
All voltages are with respect to GND
UNIT
V
I
Track input voltage – 0.3 V to V
I
+0.3 V
T
A
Operating temperature Over V
I
range – 40 ° C to 85 ° C
range
Surface temperature of module body or pins PTH12050WAH 260 ° C
(1)
T
wave
Wave solder temperature
(5 ＝ seconds)
PTH12050WAS 235 ° C
(1)
T
reflow
Solder reflow temperature Surface temperature of module body or pins
PTH12050WAZ 260 ° C
(1)
T
stg
Storage temperature – 55 ° C to 125 ° C
(2)
Mechanical shock Per Mil-STD-883D, Method 2002.3, 1 msec, ＝ Sine, mounted 500 G
Mechanical vibration Mil-STD-883D, Method 2007.2, 20-2000 Hz 20 G
Weight 2.9 grams
Flammability Meets UL 94V-O
(1) During soldering of package version, do not elevate peak temperature of the module, pins or internal components above the stated
maximum.
(2) The shipping tray or tape and reel cannot be used to bake parts at temperatures higher than 65 ° C.
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Product Folder Link(s): PTH12050W/L