Datasheet
Table Of Contents
- FEATURES
- APPLICATIONS
- DESCRIPTION
- ABSOLUTE MAXIMUM RATINGS
- ELECTRICAL CHARACTERISTICS
- ELECTRICAL CHARACTERISTICS
- DEVICE INFORMATION
- PTH12030W TYPICAL CHARACTERISTICS (VI = 12 V)Characteristic data has been developed from actual products tested at 25C. This data is considered typical data for the converter. Applies to , , and .SOA curves represent the conditions at which internal components are at or below the manufacturer’s maximum operating temperatures. Derating limits apply to modules soldered directly to a 4 in. 4 in. double-sided PCB with 1 oz. copper. For surface mount products (AS and AZ suffix), multiple vias (plated through holes) are required to add thermal paths around the power pins. Please refer to the mechanical specification for more information. Applies to .
- PTH12030L TYPICAL CHARACTERISTICS (VI = 12 V)Characteristic data has been developed from actual products tested at 25C. This data is considered typical data for the converter. Applies to , , and .SOA curves represent the conditions at which internal components are at or below the manufacturer’s maximum operating temperatures. Derating limits apply to modules soldered directly to a 4 in. 4 in. double-sided PCB with 1 oz. copper. For surface mount products (AS and AZ suffix), multiple vias (plated through holes) are required to add thermal paths around the power pins. Please refer to the mechanical specification for more information. Applies to .
- APPLICATION INFORMATION
- TAPE AND REEL SPECIFICATIONS
- TRAY SPECIFICATIONS
C
O
+
C
I
V
I
GND
MarginDown
L
O
A
D
Q2
+V
O
Q1
+
MarginUp
0V
+V
O
R
D
R
U
PT H12010W
( TopView)
1
2
10
9 8
7
6
54
3
GND
R
0.1W,1%
SET
PTH12030W/L
SLTS211H – MAY 2003 – REVISED DECEMBER 2008 ....................................................................................................................................................
www.ti.com
Table 6. Margin Up/Down Resistor Values
% ADJUST R
U
/ R
D
(k Ω )
5 0 k
4 24.9
3 66.5
2 150
1 397
Figure 21. Margin Up/Down Application Schematic
MARGIN UP/DOWN NOTES
1. The Margin Up and Margin Down controls were not intended to be activated simultaneously. If they are their
affects on the output voltage may not completely cancel, resulting in the possibility of a slightly higher error in
the output voltage set point.
2. The ground reference should be a direct connection to the module GND at pin 7 (pin 1 for the PTHxx050).
This will produce a more accurate adjustment at the load circuit terminals. The transistors Q1 and Q2 should
be located close to the regulator.
3. The Margin Up and Margin Down control inputs are not compatible with devices that source voltage. This
includes TTL logic. These are analog inputs and should only be controlled with a true open-drain device
(preferably discrete MOSFET transistor). The device selected should have low off-state leakage current.
Each input sources 8 µ A when grounded, and has an open-circuit voltage of 0.8 V.
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