Datasheet

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ELECTRICAL CHARACTERISTICS
PTH12010W , PTH12010L
SLTS205G JUNE 2003 REVISED FEBRUARY 2007
T
A
= 25 ° C, V
I
= 12 V, V
O
= 1.8 V, C
I
= 560 µ F, C
O
= 0 µ F, and I
O
= I
O
max (Unless otherwise stated)
PTH12010L
CHARACTERISTICS CONDITIONS MIN TYP MAX UNIT
60 ° C, 200 LFM airflow 0 12
(1)
I
o
Output current 0.8 V V
O
1.8 V A
25 ° C, natural convection 0 12
(1)
V
I
Input voltage range Over I
O
range 10.8 13.2 V
V
o
tol Set-point voltage tolerance ± 2
(2)
%V
o
Reg
temp
Temperature variation –40 °C <T
A
< 85 ° C ± 0.5 %V
o
Reg
line
Line regulation Over V
i
range ± 10 mV
Reg
load
Load regulation Over I
O
range ± 12 mV
Reg
tot
Total output variation Includes set-point, line, load, –40 ° C T
A
85 ° C ± 3
(2)
%V
o
V
adj
Output voltage adjust range Over V
I
range 0.8 1.8 V
R
SET
= 130 , V
o
= 1.8V 89
R
SET
= 3.57 k , V
o
= 1.5V 88
η Efficiency I
O
= 8 A R
SET
= 12.1 k , V
o
= 1.2V 86 %
R
SET
= 32.4 k , V
o
= 1V 84
R
SET
= OPEN, V
o
= 0.8V 82
V
r
V
O
ripple (peak-to-peak) 20 MHz bandwidth All V
o
1 %V
O
I
o
trip Overcurrent threshold Reset, followed by auto-recovery 20 A
t
tr
1 A/µs load step, Recovery Time 70 µ Sec
Transient response 50 to100% I
o
max,
V
O
over/undershoot 100 mV
V
tr
C
O
= 330 µ F
V
Omargin
Margin up/down adjust ± 5%
Margin Control
(pins 9 &10)
I
ILmargin
Margin input current, Pin to GND –8
(3)
µ A
I
ILtrack
Track input current (pin 8) Pin to GND –0.13
(4)
mA
dV
track
/dt Track slew rate capability C
O
C
O
(max) 1 V/ms
V
I
increasing 9.5 10.4
UVLO Undervoltage lockout V
V
I
decreasing 8.8 9
V
IH
Input high voltage, Referenced to GND Open
(4)
V
V
IL
Inhibit control (pin 3) Input low voltage, Referenced to GND –0.2 0.5
I
IL
Input low current, Pin 3 to GND 0.24 mA
I
I
Input standby current Inhibit (pin 3) to GND, Track (pin 8) open 10 mA
fs Switching frequency Over V
I
and I
o
ranges 200 250 300 kHz
C
I
External input capacitance 560
(5)
µ F
nonceramic 0 330
(6)
6,600
(7)
Capacitance value µ F
C
O
External output capacitance ceramic 0 300
Equivalent series resistance (nonceramic) 4
(8)
m
MTBF Reliability Bellcore TR-332,50% stress,T
A
=40 ° C, GND benign 6.4 10
6
Hrs
(1) See SOA curves or consult factory for appropriate derating.
(2) The set-point voltage tolerance is affected by the tolerance and stability of R
SET
. The stated limit is unconditionally met if R
SET
has a
tolerance of 1%, with 100 ppm/ ° C (or better) temperature stability.
(3) A small, low-leakage (<100 nA) MOSFET is recommended to control this pin. The open-circuit voltage is less than 1 V
dc
.
(4) This control pin has an internal pull-up to the input voltage V
I
(7.5 V for pin 8). If it is left open-circuit the module operates when input
power is applied. A small, low-leakage (<100 nA) MOSFET or open-drain/collector voltage supervisor IC is recommended for control. Do
not place an external pull-up on this pin. For further information, see the related application section.
(5) A 560 µ F electrolytic input capacitor, rated for a minimum of 800 mA rms of ripple current is required for proper operation.
(6) External output capacitance is not required for operation. Adding 330 µ F of distributed capacitance improves the transient response.
(7) This is the calculated maximum. The minimum ESR limitation oftens result in a lower value. When controlling the Track pin using a
voltage supervisor, C
O
(max) is reduced to 3300 µ F. See the application notes for further guidance.
(8) This is the typical ESR for all nonceramic ouput capacitance. Use 7 m as the minimum when using max-ESR values to calculate.
4
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