Datasheet

PTH08T230W
2
4
8
+
7
Track
GND
TT
3
GND
GND
+Sense
5
L
O
A
D
−Sense
+
10
Inhibit
INH/UVLO
Auto−Track
9
6
−Sense
+Sense
SYNC
1
SmartSync
TurboTrans
R
TT
1%
0.05 W
(Optional)
V
O
C
O
2
100 µF
(Required)
C
O
1
200 µF
Ceramic
(Required)
R
SET
1%
0.05 W
(Required)
V
I
V
O
Adj
V
I
C
I
330 µF
(Required)
(Notes B and C)
V
O
[D]
PTH08T230W, PTH08T231W
SLTS265L –NOVEMBER 2005– REVISED AUGUST 2011 www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PTH08T230W
A. R
SET
required to set the output voltage to a value higher than 0.69 V. See the Electrical Characteristics table.
B. An additional 22-μF ceramic input capacitor is recommended to reduce RMS ripple current.
C. For V
I
greater than 8 V, the minimum required C
I
may be reduced to 220 μF plus a 22-μF ceramic capacitor.
D. 200 μF of output capacitance can be achieved by using two 100-μF ceramic capacitors or four 47-μF ceramic
capacitors.
2 Copyright © 2005–2011, Texas Instruments Incorporated