Datasheet

ELECTRICAL CHARACTERISTICS
PTH05050W
www.ti.com
............................................................................................................................................................ SLTS213E MAY 2003 REVISED MARCH 2009
T
A
= 25 ° C; V
I
= 5 V; V
O
= 3.3 V; C
I
= 100 µ F, C
O1
= 0 µ F, C
O2
= 0 µ F, and I
o
= I
o
max (unless otherwise stated)
PARAMETER TEST CONDITIONS PTH05050W UNIT
MIN TYP MAX
I
O
Output current 0.8 V V
O
3.6 V 85 ° C, natural convection 0 6
(1)
A
V
I
Input voltage range Over I
O
range 4.5 5.5 V
V
Oadj
Output adjust range Over I
O
range 0.8 3.6 V
V
Otol
Set-point voltage tolerance ± 2
(2)
%V
o
Δ Reg
temp
Temperature variation 40 ° C < T
A
< 85 ° C ± 0.5 %V
o
Δ Reg
line
Line regulation Over V
I
range ± 10 mV
Δ Reg
load
Load regulation Over I
O
range ± 12 mV
Δ Reg
tot
Total output variation Includes set-point, line, load, 40 ° C T
A
85 ° C ± 3
(2)
%V
o
R
SET
= 698 , V
o
= 3.3 V 95%
R
SET
= 2.21 k , V
o
= 2.5 V 93%
R
SET
= 4.12 k , V
o
= 2.0 V 91%
η Efficiency I
O
= 4 A R
SET
= 5.49 k , V
o
= 1.8 V 90%
R
SET
= 8.87 k , V
o
= 1.5 V 89%
R
SET
= 17.4 k , V
o
= 1.2 V 87%
R
SET
= 36.5 k , V
o
= 1.0 V 85%
V
r
V
o
ripple (pk-pk) 20 MHz bandwidth, Co
2
= 10 µ F ceramic 20
(3)
mVpp
I
O
trip Over-current threshold Reset, followed by auto-recovery 12 A
t
tr
1 A/ µ s load step, Recovery time 70 µ Sec
Transient response 50 to 100% I
O
max,
V
o
over/undershoot 100 mV
Δ V
tr
C
O1
= 100 µ F
I
IL
track Track input current (pin 2) Pin to GND 130
(4)
µ A
dV
track
/dt Track slew rate capability C
O
C
O
(max) 1 V/ms
V
I
increasing 4.3 4.45
UVLO Under-voltage lockout V
V
I
decreasing 3.4 3.7
V
IH
Input high voltage, Referenced to GND Open
(4)
V
V
IL
Inhibit Control (pin 4) Input low voltage, Referenced to GND 0.2 0.6
I
IL
inhibit Input low current, Pin 4 to GND 130 µ A
I
in
inh Input standby current Inhibit (pin 4) to GND, Track (pin 2) open 10 mA
f
s
Switching frequency Over V
I
and I
O
ranges 550 600 650 kHz
C
I
External input capacitance 100
(5)
µ F
Non-ceramic 0 100
(6)
3300
(7)
Capacitance value µ F
C
O1
, C
O2
External output capacitance Ceramic 0 300
Equivalent series resistance (non-ceramic) 4
(8)
m
6
MTBF Reliability Per Bellcore TR-332, 50% stress, T
A
= 40 ° C, ground benign
10
6
Hrs
(1) No derating is required when the module is soldered directly to a 4-layer PCB with 1 oz. copper.
(2) The set-point voltage tolerance is affected by the tolerance and stability of R
SET
. The stated limit is unconditionally met if R
SET
has a
tolerance of 1% with 100 ppm/ ° C or better temperature stability.
(3) The pk-pk output ripple voltage is measured with an external 10 µ F ceramic capacitor. See the standard application schematic.
(4) This control pin has an internal pull-up to the input voltage. If it is left open-circuit the module will operate when input power is applied. A
small, low leakage ( < 100 nA) MOSFET or open-drain/collector voltage supervisor IC is recommended for control. Do not place an
external pull-up on this pin. For further information, consult the related application note.
(5) A 100 µ F input capacitor are required for proper operation. The capacitor must be rated for a minimum of 300 mA rms of ripple current.
(6) An external output capacitor is not required for basic operation. Adding 100 µ F of distributed capacitance at the load will improve the
transient response.
(7) This is the calculated maximum. The minimum ESR limitation will often result in a lower value. When controlling the Track pin using a
voltage supervisor, C
O
(max) is reduced to 2200 µ F. Consult the application notes for further guidance.
(8) This is the typical ESR for all the electrolytic (non-ceramic) output capacitance. Use 7 m as he minimum when using max-ESR values
to calculate.
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