Datasheet

PTH04040W
www.ti.com SLTS238C –SEPTEMBER 2005–REVISED JUNE 2010
ELECTRICAL CHARACTERISTICS
T
A
= 25°C, V
I
= 5 V, V
O
= 2.5 V, C
I
= 1000 µF, C
O
= 660 µF, and I
O
= I
O
max (unless otherwise stated)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
I
O
Output current 60°C, 200 LFM airflow 0 60
(1)
A
V
I
Input voltage range Over I
O
range 2.95
(2)
5.5 V
V
O
tol Set-point voltage tolerance ±2
(3)
%V
O
ΔReg
temp
Temperature variation –40°C < T
A
< 85°C ±0.5 %V
O
ΔReg
line
Line regulation Over V
I
range ±5 mV
ΔReg
load
Load regulation Over I
O
range ±5 mV
ΔReg
tot
Total output variation Includes set-point, line, load, –40°C ≤ T
A
≤ 85°C ±3
(3)
%V
O
2.95 ≤ V
I
≤ 4.5 V
(3)
0.8 - 1.65
V
O, ADJ
Output adjust range V
4.5 < V
I
≤ 5.5 V
(3)
0.8 - 2.5
R
SET
= 2.21 kΩ, V
O
= 2.5 V 93%
R
SET
= 5.49 kΩ, V
O
= 1.8 V 90%
V
I
= 5 V, I
O
= 45 A
R
SET
= 8.87 kΩ, V
O
= 1.5 V 88%
h Efficiency R
SET
= 17.4 kΩ, V
O
= 1.2 V 86%
R
SET
= 6.92 kΩ, V
O
= 1.65 V 92%
V
I
= 3.3 V, I
O
= 45 A R
SET
= 8.87 kΩ, V
O
= 1.5 V 91%
R
SET
= 36.5 kΩ, V
O
= 1 V 87%
V
R
V
O
ripple (peak-to-peak) 20-MHz bandwidth All voltages 15 mV
PP
I
O
trip Overcurrent threshold Reset, followed by auto-recovery 90 A
t
rr
Recovery time 100 µS
1 A/µs load step, 50 to 100%
Transient response
I
O
max, C
O
=660µF
ΔV
tr
V
O
over/undershoot 200 mV
Margin up down adjust From a given set-point voltage ±5% %
I
IL
margin Margin input current Pin to GND –8
(4)
µA
I
IL
track Track input current (pin 18) Pin to GND –0.11
(5)
mA
dV/dt Track slew rate capability |V
TRACK
– V
O
| ≤ 50 mV and V
(TRACK)
< V
O
(nom) 1 V/ms
On-threshold 2.6
(6)
UVLO Undervoltage lockout Pin 8 open V
Hysterisis 0.6
(6)
Input high voltage (V
IH
), Referenced to GND 2.5 Open
(7)
V
Inhibit control (pin 7) Input low voltage (V
IL
), Referenced to GND –0.2 0.5
Input low current (I
IL
), Pin to GND 0.5 mA
I
I
inh Input standby current Inhibit (pin 7) to GND 60 mA
f
s
Switching frequency Over V
I
and I
O
ranges 675 825 975 kHz
(1) See SOA curves or consult factory for appropriate derating.
(2) The nominal input voltage must be at least 2 × V
O
. Output voltage regulation is specified with an input voltage within ±10% from nominal
3.3 V or 5 V. For example, for V
I
= 5 V and V
O
= 2.5 V, the input can vary between 4.5 V and 5.5 V.
(3) The set-point voltage tolerance is affected by the tolerance of R
SET
. The stated limit is unconditionally met if R
SET
has a tolerance of 1%
with 100 ppm/°C or better temperature stability.
(4) A small, low-leakage (<100 nA) MOSFET is recommended to control this pin. The open-circuit voltage is less than 1 Vdc.
(5) This control pin has an internal pull-up to V
I
. If it is left open-circuit the module operates when input power is applied. A small,
low-leakage (<100 nA) MOSFET or open-drain/collector voltage supervisor IC is recommended for control. See the Auto-Track
Application Information section for further guidance.
(6) These are the default voltages. They may be adjusted using the UVLO Prog control input. See the UVLO Application Information section
for further guidance.
(7) This control pin has an internal pull-up to V
I
. If it is left open-circuit the module operates when input power is applied. A small,
low-leakage (<100 nA) MOSFET or open-drain/collector voltage supervisor IC is recommended for control. Do not place an external
pull-up on this pin. See the Inhibit Application Information section for further guidance.
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