Datasheet

THD
R
=
12.9
V − 2.63
THD
kΩ
= 2.191
1
+
0.283
V
V
HYS
THD
R
PTH04040W
2
4
6
1
3
5
V
I
V
I
7
8
UVLOProg
Inhibit
GND
GND
R
THD
C
1,000 F
I
m
PTH04040W
www.ti.com SLTS238C –SEPTEMBER 2005–REVISED JUNE 2010
ADJUSTING THE UNDERVOLTAGE LOCKOUT (UVLO) OF THE PTH04040W
The PTH04040W power modules incorporate an input undervoltage lockout (UVLO). The UVLO feature prevents
the operation of the module until there is sufficient input voltage to produce a valid output voltage. This enables
the module to provide a monotonic powerup for the load circuit, and also limits the magnitude of current drawn
from the module’s input source during the power-up sequence.
The UVLO characteristic is defined by the on-threshold (V
THD
) and hysterisis (V
HYS
) voltages. Below the on
threshold, the Inhibit control is overriden, and the module does not produce an output. Hysterisis voltage is the
difference between the on and off threshold voltages. It ensures a clean power-up, even when the input voltage
is rising slowly. The hysterisis prevents start-up oscillations, which can occur if the input voltage droops slightly
when the module begins drawing current from the input source.
UVLO ADJUSTMENT
The UVLO feature of the PTH04040W gives the user the option of adjusting the on-threshold voltage higher than
the default value. This might be desirable if the module is powered from a 5-V input bus. This prevents the
module from operating until the input bus has risen closer to its regulation voltage.
The adjustment method uses the UVLO Prog control (pin 8). If the UVLO Prog pin is left open circuit, the
onthreshold voltage remains at its nominal value of 2.63 V (see electrical specification table). This ensures that
the unadjusted module produces a regulated output when the minimum input voltage is applied. The hysterisis
voltage is approximately 0.62 V, which correlates to an off-threshold voltage of about 2 V. The magnitude of the
hysterisis is automatically set to about 22% of the onthreshold. So if the on-threshold voltage is increased, then
the Hysterisis also increases.
UVLO ADJUSTMENT METHOD
Figure 10 shows the placement of the resistor, R
THD
, for adjusting the UVLO on-threshold voltage. It connects
from the UVLO Prog control pin to GND. Equation 2 determines the value of R
THD
required to adjust V
THD
to a
new value. The default value is 2.63 V, and it can only be adjusted higher. Once the value of R
THD
has been set,
Equation 3 is used to determine the new hysterisis voltage.
(2)
(3)
Figure 10. UVLO Program Resistor Placement
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