Datasheet

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ELECTRICAL CHARACTERISTICS
PTH04000W
SLTS247B JUNE 2005 REVISED OCTOBER 2007
at 25 ° C free-air temperature, V
I
= 5 V, V
O
= 3.3 V, I
O
= I
O
(Max), C
I
= 47 µF (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
I
O
Output current T
A
= 25 ° C, natural convection 0 3
(1)
A
V
I
Input voltage range Over I
O
range 3
(2)
5.5 V
V
O(TOL)
Set-point voltage tolerance T
A
= 25 ° C ± 2
(3)
%V
O
Temperature variation 40 ° C T
A
85 ° C ± 0.5 %V
O
Line regulation Over V
I
range ± 1 mV
Load regulation Over I
O
range ± 5 mV
Includes set-point, line, load,
Total output voltage variation ± 3
(3)
%V
O
40 ° C T
A
85 ° C
V
I
4.5 V 0.9 3.6
V
O(ADJ)
Output voltage adjust range V
V
I
< 4.5 V 0.9 V
I
1.1
(2)
T
A
= 25C, I
O
= 2 A
R
SET
= 475 , V
O
= 3.3 V
(2)
92%
R
SET
= 2.32 k , V
O
= 2.5 V
(2)
89%
η Efficiency R
SET
= 6.65 k , V
O
= 1.8 V 86%
R
SET
= 11.5 k , V
O
= 1.5 V 84%
R
SET
= 26.1 k , V
O
= 1.2 V 82%
R
SET
= 84.5 k , V
O
= 1 V 78%
Output voltage ripple 20 MHz bandwith 10 mV
PP
Overcurrent threshold Reset, followed by autorecovery 7 A
1 A/s load step from 50% to 100% I
O
max,
C
O
= 47 µF
Transient response
Recovery time 70 µs
V
O
over/undershoot 100 mV
I
IL
track Track Input Current (pin 2) Pin to GND 130 µA
dV
track
/dt Track Slew Rate Capability C
O
C
O
(max) 1 V/ms
V
I
= increasing 2.95 3
UVLO Undervoltage lockout V
V
I
= decreasing 2.7 2.8
Input high voltage (V
IH
) V
I
0.5 Open
(4)
V
Inhibit control (pin 4) Input low voltage (V
IL
) 0.2 0.6
Input low current (I
IL
) 10 µA
I
I (STBY)
Input standby current Inhibit (pin 4) to GND, Track (pin 2) open 1 mA
F
S
Switching frequency Over V
I
and I
O
ranges 700 kHz
External input capacitance Ceramic type (C1) 47
(5)
µF
Ceramic type (C2) 0
(6)
150
µF
External output capacitance
(6)
Nonceramic type (C3) 47
(6)
560
(7)
Equivalent series resistance (nonceramic) 4
(8)
m
Per Telcordia SR-332, 50% stress,
MTBF Calculated reliability 15
10
6
Hr
T
A
= 40C, ground benign
(1) See SOA temperature derating curves to identify maximum output current at higher ambient temperatures.
(2) The minimum input voltage is 3 V or (V
O
+ 1.1) V, whichever is greater. A 5-V input bus is recommended for output voltages higher than
2 V.
(3) The set-point voltage tolerance is affected by the tolerance and stability of R
SET
. The stated limit is unconditionally met if R
SET
has a
tolerance of 1% with 100 ppm/ ° C or better temperature stability.
(4) This control pin has an internal pullup to the input voltage V
I
. Do not tie the inhibit pin to V
I
or to another module's inhibit pin. If it is left
open circuit, the module operates when input power is applied. A small low-leakage (< 100 nA) MOSFET is recommended for control.
See the application section for further guidance.
(5) An external 47-µF ceramic capacitor is required across the input (V
I
and GND) for proper operation. Locate the capacitor close to the
module.
(6) An external output capacitor is not required for basic operation. Additional capacitance at the load improves the transient response.
(7) This is the calculated maximum capacitance. The minimum ESR limitation often results in a lower value. See the capacitor application
information for further guidance.
(8) This is the minimum ESR for all the electrolytic (nonceramic) capacitance. Use 7 m as the minimum when calculating the total
equivalent series resistance (ESR) using the max-ESR values specified by the capacitor manufacturer.
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