Datasheet

Amp
R
O
R
O
ADC
C
IN
V
AMP-
V
AMP+
V
ADC-
V
ADC+
V
REF
R
P
R
IN
R
P
V
REF
R = R
P O
V V
V V
ADC REF
AMP CM
-
-
GAIN =
2R || Z
P IN
2R + 2R || Z
O P IN
R = 2R + 2R || Z
L O P IN
V =
AMP_PP
V
GAIN
ADC_FS
PGA870
www.ti.com SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011
ADC Input Common-Mode Voltage Considerations: DC-Coupled Input
DC-coupled applications vary in complexity and requirements depending on the ADC; one requirement is the
need to resolve the mismatch between the common-mode voltage of the driving amplifier and the ADC. For
example, while the PGA870 has a fixed output common-mode of midsupply, or 2.5 V on a single 5-V supply, the
ADS6149 requires a nominal 1.5-V input common-mode. The ADS58C48 and ADS4149, however, both require a
nominal 0.95-V input common-mode. As Figure 50 shows, a resistor network can be used to perform a
common-mode level shift. This resistor network consists of the amplifier series output resistors and pull-up or
pull-down resistors to a reference voltage. This resistor network introduces signal attenuation that may prevent
the use of the full-scale input range of the ADC. ADCs with an input common-mode closer to the PGA870 output
common-mode of 2.5 V are easier to use in a dc-coupled configuration, and require little or no level shifting.
Figure 50. Resistor Network to DC Level-Shift Common-Mode Voltage
For common-mode analysis of the circuit in Figure 48, assume that V
AMP±
= V
OCM
(for the PGA870, 2.5 V on a
single 5-V supply) and V
ADC±
= V
CM
(the specification for the ADC input common-mode voltage). V
REF
is chosen
to be a voltage within the system greater than V
CM
(such as the ADC or amplifier analog supply) or ground,
depending on whether the voltage must be pulled up or down, respectively, and R
O
is chosen to be a reasonable
value, such as 24.9 Ω. With these known values, R
P
can be found by using Equation 5.
(5)
Shifting the common-mode with the resistor network comes at the expense of signal attenuation. Modeling the
ADC input as the parallel combination of a resistance R
IN
and capacitance C
IN
using values taken from the
respective ADC data sheet, the approximate differential input impedance, Z
IN
, for the ADC can be calculated at
the signal frequency. This impedance creates a divider with the resistor network, whose gain (attenuation) can be
calculated by Equation 6:
(6)
The introduction of the R
P
resistors also modifies the effective load seen by the amplifier. The effective load seen
by the amplifier is then calculated by Equation 7.
(7)
The R
P
resistors act in parallel to the ADC input such that the effective load (that is, the output current) seen by
the amplifier is increased. Higher current loads limit the PGA870 differential output swing and the typical
distortion performance is only specified for load impedances of 100-Ω differential and greater.
Using the gain and knowing the full-scale input of the ADC, V
ADC_FS
, the required amplitude to drive the ADC with
the network can be calculated with Equation 8.
(8)
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