Datasheet

V
S
Attenuator
IN-
V
MID2
IN+
1
2
7
8
Buffered
MUX
Output
Amp
GainControl
BIAS
Control
Gain
Strobe
Latch
Mode
B0
(LSB)
B1 B2 B3 B4 B5
(MSB)
Disable
OUT-
OUT+
PGA870
Gain=+20dB
PGA870
SBOS436A –DECEMBER 2009–REVISED FEBRUARY 2011 www.ti.com
APPLICATION INFORMATION
Device Operation
The PGA870 is a wideband, fully differential, programmable-gain amplifier. Looking at the block diagram in
Figure 42, the PGA870 can be separated into the following functional blocks:
• Input Attenuator
• Buffered MUX
• Output Amplifier
• 8-bit digital interface
• Power function
Figure 42. PGA870 Block Diagram
Input Attenuator
The input stage of the PGA870 consists of a logarithmic R2R ladder and presents a 150-Ω load to the previous
stage. To minimize input return loss and noise figure, it is recommended to provide a 150-Ω matching for that
input. This input can be driven either differentially or single-ended.
This resistive input network is internally biased to midsupply by an internal buffer (V
MID2
on pin 4). Proper
bypassing is required on this node (0.1 μF). The buffer midsupply is generated by a passive resistor network
(V
MID1
on pin 28). A 0.1-μF capacitor is expected on V
MID1
for adequate bypassing. Although V
MID1
and V
MID2
are
externally accessible, neither of these pins is intended to be externally driven. Additionally, V
MID2
is not intended
to drive the midsupply reference to another chip, but can source approximately 200 μA if required.
During power-down operation, the input maintains its nominal differential resistance. However, V
MD1
and V
MID2
fall to 0 V. The input attenuator is controlled via the three most significant bits (MSBs) of the gain control. Refer
to Table 1 for the step size of each of these three MSBs.
Input Amplifier and Buffered MUX
Following the input attenuator is a programmable buffer stage; the gain of the programmable buffer is controlled
by the three least significant bits (LSBs) of the gain-control word. Refer to Table 1 for the step size of each of
these three LSBs.
Table 1. Gain Bits and Corresponding Gain Step Sizes (in dB)
(MSB) (LSB)
B5 B4 B3 B2 B1 B0
16 8 4 2 1 0.5
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Product Folder Link(s): PGA870