Datasheet

MAX3221EUE+
C1+
2
C1-
4
C2+
5
C2-
6
TIN
11
ROUT
9
EN
1
FORCEON
12
GND
14
V+
3
V-
7
TOUT (RS232)
13
RIN (RS232)
8
VCC
15
~FORCEOFF
16
~INVALID
10
U4
1
2
3
4
5
6
7
8
9
11
10
J1
D Connector 9
C230.1uF,0603,50V,10%,X7R
C250.47uF,0805,50V,10%,X7R
C28
0.1uF,0603,50V,10%,X7R
GND
GND_UART
TX_232
RX_232
~INVALID
C22
0.47uF,0805,50V,10%,X7R
C24
0.47uF,0805,50V,10%,X7R
TX_232
5V
RS232 VCC
Rx
Tx
C27
1uF,0603,25V,10%,X7R
R13
0,0603,1/8W,5%
L1
BEAD
GND_UART
GND_UART
GND_UART
GND_UART
TXD
RXD
RX_232
C26
100uF,SMT,35V,20%,AL
GND_UART
GND_UART
GND_UART
tssop footprint and P/N
TXD
R11
10.0k,0603,1/10W,5%
5V
TPIC1021AQDRQ1
RXD
1
EN
2
NWAKE
3
TXD
4
GND
5
LIN
6
VSUP
7
INH
8
U1
LIN TxD GND
LIN RxD
GND
V_LIN
V_LIN
GND
LIN EN
FOOTPRINT OK 4/21/10
BAV3004W-7-F
D3
R5
1.0k,0603,1/10W,5%
C5
220pF,0603,50V,10%,X7R
R4
1.0k,0603,1/10W,5%
C4
0.1uF,0805,50V,10%,X7R
R3
0,0603,1/10W,5%
NWAKE
R6
0,0603,1/10W,5%
GND
5V 5V
V_LIN LIN
GND
GND
LIN
www.ti.com PGA450-Q1 Communication Interfaces
Figure 3. LIN Master Transceiver
The 5-V supply in Figure 3 is provided by the USB communication board.
9.3 UART
An RS-232 transceiver (MAX3221) is present on the EVM that can be used as a debugging interface from
the 8051 MCU to a host PC. The circuit connects the TXD and RXD pins on the PGA450-Q1 to the
MAX3221. The RX and TX RS-232 signals are routed to a standard DB-9 connector on the EVM. The RS-
232 circuit is shown in Figure 4.
Figure 4. RS232 Transceiver
9
SLDU007A–March 2012–Revised January 2013 PGA450-Q1 EVM User’s Guide
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