Datasheet
1 6
3 4
2
TI to supply
TR1
TRANSFORMER
XFMR RETURN
VREG
GND
OUTB
OUTA
Temperature Compensation Cap for the XDCR
Match to the Selected XDCR
C21
100uF,SMT,35V,20%,AL
1
1
2
2
P5
OUTPUT
C20
1500pF,0805,250V,20%,NPO
JP3
XFRM
GND
LIM
IN
XFMR RETURN
C19
0.1uF,0603,50V,10%,X7R
R9
3.3k,1210,1/4W,5%,+-200ppm/C
1
1
2
2
DO NOT POPULATE
P6
JP4
JP5
Socket for Programming OTP
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7 Socket for Programming OTP
The PGA450-Q1 EVM runs from the PGA450-Q1 device that is soldered to the board. In addition, the
EVM provides a footprint for a socket to enable programming the OTP in devices that are for customer-
board use. The socket is not populated by default on the EVM. The part number for the recommended
socket is OTS-28-0.65-01.
The GUI then can be used to select the target PGA450-Q1 when programming OTP (the two options are
the soldered device, or the device in the socket). More details of how to do this are described in the OTP
section.
8 Transformer and Transducer
The PGA450-Q1 has a matched transformer-transducer pair. The transformer is a tunable Toko push-pull
transformer, whereas the transducer is a Murata transducer with the Murata part number MA58MF14-0N
(58 kHz).
Figure 2. PGA450-Q1 With Transformer and Connector for Connecting the Transformer
9 PGA450-Q1 Communication Interfaces
The PGA450-Q1 has several communication options including: SPI, LIN, and UART. All of these
communication interfaces and related circuitry are present on the PGA450-Q1 EVM.
9.1 SPI
SPI is the main communication method on the PGA450-Q1. The 8051W inside the device must be put in
reset to communicate using SPI. The SPI signals can be monitored with the CS, SCLK, SDI, and SDO
test points on the EVM.
9.2 LIN
The EVM includes a LIN transceiver, which is the master transceiver. The PGA450-Q1 is always a slave
on the LIN bus and has the slave transceiver integrated inside the device.
8
PGA450-Q1 EVM User’s Guide SLDU007A–March 2012–Revised January 2013
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