Datasheet

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List of Figures

1 PGA450-Q1 EVM Set-Up.................................................................................................. 6

2 PGA450-Q1 With Transformer and Connector for Connecting the Transformer ................................... 8

3 LIN Master Transceiver .................................................................................................... 9

4 RS232 Transceiver ......................................................................................................... 9

5 Loading a .HEX File Into the GUI ....................................................................................... 12

6 OTP Memory Successful Programming Verification.................................................................. 13

7 OTP Memory can be programmed while programming the Development RAM .................................. 14

8 Echo Data Stored in FIFO RAM Plotted in Excel ..................................................................... 15

9 LIN Master on GUI ........................................................................................................ 16

10 Evaluation Tab Setting.................................................................................................... 18

11 Echo Analog Waveform Output (Channel1), Drive voltage (Channel 2) ........................................... 19

12 DAC Output of Filtered Signal (Channel 2) and Drive Voltage (Channel 1) ....................................... 20

13 Schematic, LIN............................................................................................................. 21

14 Schematic, Power ......................................................................................................... 21

15 Schematic, RS232......................................................................................................... 22

16 Schematic, USB Controller............................................................................................... 22

17 Schematic, PGA450-Q1 .................................................................................................. 23

18 PCB Layout, Bottom ...................................................................................................... 24

19 PCB Layout, Top .......................................................................................................... 24

List of Tables

1 Jumpers ...................................................................................................................... 7

2 Default Jumper Settings.................................................................................................... 7

3 Default 0-Ω Resistor Setting............................................................................................... 7

List of Figures SLDU007A–March 2012–Revised January 2013

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