PGA450-Q1 EVM User’s Guide User's Guide Literature Number: SLDU007A March 2012 – Revised January 2013
Contents 1 2 3 4 5 6 7 8 9 10 2 Read This First ................................................................................................................... About This Manual .............................................................................................................. EVM Overview .................................................................................................................... CAUTION ............................................................................
www.ti.com 11 12 LIN Master ........................................................................................................................ 16 Use Case .......................................................................................................................... 17 13 ........................................................................... 17 ............................................................................................
www.ti.com List of Figures 1 PGA450-Q1 EVM Set-Up .................................................................................................. 6 2 PGA450-Q1 With Transformer and Connector for Connecting the Transformer ................................... 8 3 LIN Master Transceiver .................................................................................................... 9 4 RS232 Transceiver .............................................................................................
User's Guide SLDU007A – March 2012 – Revised January 2013 PGA450-Q1 EVM User’s Guide 1 Read This First The PGA450-Q1 is an interface device for ultrasonic transducers used in automotive parking assistance and blind spot detection applications. The device functions as the driver and receiver for a wide range of transducers with frequency ranges from 40kHz to 70kHz. The PGA450-Q1 incorporates an analog front end (AFE) and a 8051W microprocessor core.
Power-Supply Requirements and Connections 5 Power-Supply Requirements and Connections 5.1 Power Supply www.ti.com Only one main power supply is needed. Apply 7 VDC to 18 VDC to the PGA450-Q1EVM that supplies power to the entire board, except for the USB communications board and LIN which are powered by the USB communication PCB. Connect a power supply to the banana jacks, P1 “VPWR_IN” and P3 “GND” or use the screw terminal P2. 5.
Jumper Settings www.ti.com 6 Jumper Settings There are several jumpers and 0-Ω resistors located on the board, which are used to configure the connections to the PGA450-Q1 and the rest of the EVM. The default settings and their effects are listed below. 6.1 Jumpers Table 1 shows the function of each specific jumper setting on the EVM. Table 1. Jumpers Reference Jumper Setting Closed VPWR:VOTP Open Closed VPWR:VLIN Open Closed JP3 JP4 6.
Socket for Programming OTP 7 www.ti.com Socket for Programming OTP The PGA450-Q1 EVM runs from the PGA450-Q1 device that is soldered to the board. In addition, the EVM provides a footprint for a socket to enable programming the OTP in devices that are for customerboard use. The socket is not populated by default on the EVM. The part number for the recommended socket is OTS-28-0.65-01.
PGA450-Q1 Communication Interfaces C4 GND BAV3004W-7-F 0,0603,1/10W,5% V_LIN 5V 5V R3 R4 1.0k,0603,1/10W,5% V_LIN D3 1 2 3 4 R6 RXD INH EN VSUP NWAKE LIN TXD GND LIN GND R5 1.0k,0603,1/10W,5% U1 LIN RxD LIN EN NWAKE LIN TxD 0,0603,1/10W,5% 0.1uF,0805,50V,10%,X7R www.ti.com 8 7 6 5 V_LIN LIN GND GND C5 220pF,0603,50V,10%,X7R TPIC1021AQDRQ1 FOOTPRINT OK 4/21/10 GND GND Figure 3. LIN Master Transceiver The 5-V supply in Figure 3 is provided by the USB communication board. 9.
Controlling the PGA450-Q1 Memory Spaces With the GUI 10 www.ti.com Controlling the PGA450-Q1 Memory Spaces With the GUI The PGA450-Q1 EVM is controlled by the user through a PC with the USB communication board and associated GUI. The PGA450-Q1 EVM GUI provides ways to manipulate all of the register spaces present inside the PGA450-Q1 (ESFR, EEPROM, RAM, OTP, DEVELOPMENT RAM). The following sections describe how to manipulate the register spaces. 10.
Controlling the PGA450-Q1 Memory Spaces With the GUI www.ti.com 10.2 ESFR Registers The ESFR register displays all the function registers that are specific to PGA450-Q1 functionality. The user can set each register manually through SPI or define register values in 8051W firmware. An Evaluation tab on the right side helps to set the ESFR registers for quick evaluation. More details of the Evaluation tab are described in a later section. 10.
Controlling the PGA450-Q1 Memory Spaces With the GUI 10.5.1 www.ti.com Load .HEX File Into GUI The Load .HEX File into GUI button is used to load the contents of a .HEX file into the GUI RAM for use with other operations. When the button is pressed, a second window opens that allows the user to locate and open the desired .HEX file on the PC. See Figure 5 for an example of this operation. Figure 5. Loading a .HEX File Into the GUI 10.5.2 Program OTP Memory from .
Controlling the PGA450-Q1 Memory Spaces With the GUI www.ti.com Figure 6. OTP Memory Successful Programming Verification 10.5.4 Check OTP Status Press the "Check OTP Status" button to verify what is currently programmed into OTP. The three possible results are: • Programmed to Jump to DEVRAM: The jump to DEVRAM statement has been programmed into the OTP. This means that programs loaded into the DEVRAM will execute. • OTP Empty: Nothing has been programmed in the OTP.
Controlling the PGA450-Q1 Memory Spaces With the GUI www.ti.com Note that OTP programming may be required if the interrupt vectors are not programmed Figure 7. OTP Memory can be programmed while programming the Development RAM 10.7 FIFO/ECHO 10.7.1 FIFO The PGA450-Q1 has a FIFO RAM that contains the output of the digital data path. The contents of the FIFO RAM can be displayed on the GUI and/or can be plotted in Excel. The FIFO RAM is displayed in the form of a grid.
Controlling the PGA450-Q1 Memory Spaces With the GUI www.ti.com Figure 8. Echo Data Stored in FIFO RAM Plotted in Excel 10.7.2 EVAL Monitor This tab graphs the output of the digital data path directly in the GUI. The 8051W microcontroller must be in reset to use this tab. 10.7.2.1 No. of Loops This option selects how many times the GUI will transmit a burst and plot the echo data. 10.7.2.
LIN Master 10.7.2.5 www.ti.com Export Data to Excel This option exports the echo data to Excel for each loop. 10.7.2.6 Start/Stop Click on the "Start" button to start the first loop. Click on "Stop" at any time to stop the program immediately. 11 LIN Master The PGA450-Q1 GUI communicates with the PGA450-Q1 using LIN. The USB Communication board UART is the LIN master, and the PGA450-Q1 is the LIN slave. The GUI can be used to configure the LIN frames that are transmitted to the PGA450-Q1. Figure 9.
Use Case www.ti.com 1. Enter the Frame PID in Edit Box corresponding to “Rx Frame PID”. The PID must be entered in hex. Note that valid PID ranges from 0x00 to 0x3F. The GUI software calculates the parity bits using the LIN 2.1 method before the PID is transmitted. 2. Enter the number of data bytes the user expects back from the PGA450-Q1 3. Select the CLASSIC or ENHANCED checksum 4. Click on the RECEIVE button The data received from the PGA450-Q1 is displayed in the Data Received box.
Use Case www.ti.com Figure 10. Evaluation Tab Setting After all information is entered, make sure the device is in the micro reset state, then hit the Transducer Drive and Receive button to start the burst and receive. 12.2 Monitoring the Signal Path The PGA450-Q1 has two useful test modes that allow users to quickly observe the echo signal as an amplified analog signal or from a DAC output which converts a digitally filtered echo signal.
Use Case www.ti.com Figure 11.
Use Case www.ti.com Figure 12.
PGA450-Q1 EVM Schematics and Layout Drawings www.ti.com V_LIN GND 5V R3 R4 1.0k,0603,1/10W,5% V_LIN D3 1 2 3 4 R6 RXD INH EN VSUP NWAKE LIN TXD GND 8 7 6 5 LIN GND R5 1.0k,0603,1/10W,5% U1 LIN RxD LIN EN NWAKE LIN TxD 0,0603,1/10W,5% C4 5V BAV3004W-7-F 0,0603,1/10W,5% PGA450-Q1 EVM Schematics and Layout Drawings 0.1uF,0805,50V,10%,X7R 13 V_LIN LIN GND GND C5 220pF,0603,50V,10%,X7R TPIC1021AQDRQ1 FOOTPRINT OK 4/21/10 GND GND Figure 13.
PGA450-Q1 EVM Schematics and Layout Drawings www.ti.com C22 U4 2 0.1uF,0603,50V,10%,X7R C23 C1+ V+ C1C2+ V- 0.47uF,0805,50V,10%,X7R 3 GND_UART C24 4 5 0.47uF,0805,50V,10%,X7R C25 0.
PGA450-Q1 EVM Schematics and Layout Drawings www.ti.
PGA450-Q1 EVM Schematics and Layout Drawings www.ti.
EVALUATION BOARD/KIT/MODULE (EVM) ADDITIONAL TERMS Texas Instruments (TI) provides the enclosed Evaluation Board/Kit/Module (EVM) under the following conditions: The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims arising from the handling or use of the goods.
FCC Interference Statement for Class B EVM devices This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications.
【Important Notice for Users of this Product in Japan】 】 This development kit is NOT certified as Confirming to Technical Regulations of Radio Law of Japan If you use this product in Japan, you are required by Radio Law of Japan to follow the instructions below with respect to this product: 1. 2. 3. Use this product in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal Affairs and Communications on March 28, 2006, based on Sub-section 1.
EVALUATION BOARD/KIT/MODULE (EVM) WARNINGS, RESTRICTIONS AND DISCLAIMERS For Feasibility Evaluation Only, in Laboratory/Development Environments. Unless otherwise indicated, this EVM is not a finished electrical equipment and not intended for consumer use.
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
