Datasheet

2.6 Schematic
Hardware Guide
Figure 2. EVM Schematic.
PGA4311PA
SN74HC54IN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
MUTE
AGND1
AIN1
AGND1
AOUT1
VA–
VA+
AOUT3
AGND3
AIN3
AGND3
VD+
SDI
CS
ZCEN
AGND2
AIN2
AGND2
AOUT2
VA–
VA+
AOUT4
AGND4
AIN4
AGND4
DGND
SDO
SCLK
2
3
4
5
6
7
8
9
1
19
18
17
16
15
14
13
12
11
20
10
A1
A2
A3
A4
A5
A6
A7
A8
G1
G2
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
VCC
GND
10kΩ
10
8
6
4
2
9
7
5
3
1
12
LPT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
STROBE
D0
D1
D2
D3
D4
D5
D6
D7
ACK
BUSY
P EMPT
SELECT
A FEED
ERROR
INIT
SL INP
GND
GND
GND
GND
GND
GND
GND
GND
J15
DATA_OUT
1
3
5
7
9
11
13
MUTE
SCLK
SDI (N + 1)
CS
ZCEN
RB
2
4
6
8
10
12
14
RN1
RN2
U2
J16
47kΩ
1
2
3
4
5
6
J4
VD+ GND VA– VA+
J6
DATA_IN
1
3
5
7
9
11
13
MUTE
SCLK
SDI (N)
CS
ZCEN
RB
2
4
6
8
10
12
14
SDI (1)
C
7
0.01µF
SDO_R
2
1
J1
21
J2
21
J3
L1
4321
SDO (N)
TP7
TP5
DGND
SDO
ZCEN
CS
SDI
SCLK
MUTE
TP6
AGND
C
1
10µF
C
2
0.1µF
TP1
AIN1
J7
1
3
2
TP3
AOUT1
J8
1
3
2
TP10
AOUT3
J11
1
3
2
TP8
AIN3
J8
1
3
2
VA–
U1
J5
DUT_N
C
11
0.1µF
C
12
0.1µF
R1
100kΩ
VA+
VA–
VD+
VA+
C
10
0.1µF
C
8
1µF
C
9
0.1µF
VA+
VA–
C
5
10µF
C
6
0.1µF
C
3
10µF
C
4
0.1µF
TP2
AIN2
J9
1
3
2
TP4
AOUT2
J10
1
3
2
TP11
AOUT4
J13
1
3
2
TP9
AIN4
J14
1
3
2
C
12
to DUT pin 17 and DUT pin 23.
Guard AIN pins with adjacent AGND pins.
J3 is a jumper wire.
2-4