Datasheet

ControlRegisters
RAM
AlarmRegister
R
F
R
F
R
G
R
R
8R
V
REF
4R
4R
8R
3
Auto
Zero
Auto
Zero
Auto
Zero
Output
Amplifier
InputMux
V
INN
V
INP
A2
A1
A3
Front-End
PGAGain
PGA
DiffAmp
NOTES: (1)User-adjustablefeature.
(2)Optionalconnection;seethe sectionformoreinformation.One-WireOperationwith1WConnectedtoVOUT
(3)Optionalconnection;seethePGA308User'sGuideformoreinformation.
R
GO
V
OUTFILT
C
F
C
L
V
REF
V
REF
V
S
V
REF
16-BitDAC
0<V <V
ZDAC REF
InputMuxControl
(1)
7-Bit+Sign
DAC
CoarseOffsetRange
(1)
CoarseOffsetAdjust
(1)
FaultMonitor
Circuit
Ref
Select
Bridge
Sensor
ZeroDAC
GainDAC
V
IN1
V
OS
V
REF
V
S
V
IN2
FineOffsetAdjust
(1)
(16-Bit)
PGAGainSelect(1of16)
(1)
Rangeof4to1600
(w/PGADiffAmpGain=4)
Front-EndPGAOut
Gain=x4tox1600
OffsetDuetoZeroDAC
-0.5V <Offset<+0.5V
REF REF
AlarmRegisterInputs
OutputGainSelect(1-of-7)
(1)
Rangeof2to5
INT/EXTFBSelect
(1)
FaultRef
Select
(1)
FaultDetectMode
(1)
FineGainAdjust(16-Bit)
(1)
OS/USRefSelect
(1)
DOUT/VCLAMP
(1)
Digital
Controls
R
FO
R
ISO
V
OUT
1
1
2
R
CL1
R
CL2
D /V
OUT CLAMP
V
CLAMP
Mode
Only
1W
V
FB
V
SJ
Scale
Limit
Interface
and
Control
Circuitry
OTP
(7Banks)
Clamp
V
LIM
3-BitDAC
Under-ScaleLimit
(1)
V
LIM
V
S
3-BitDAC
Over-ScaleLimit
(1)
(2)
(3)
POR
V
S
V
S
Ref
Select
DigitalOut
V
S
V
REF
V
LIM
V
REF
GND
PGA308
PGA308
www.ti.com SBOS440B –JULY 2008–REVISED DECEMBER 2010
Figure 37. Detailed Block Diagram
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