Datasheet

SCLK
SDI
SDO
DVDD
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
CS
INP1
INN1
VSN
DGND
VON
VOP
VOCM
VSOP
VSON
VSP
INP2
INN2
PGA280
16
15
14
13
24
23
22
21
20
19
18
17
9
10
11
12
1
2
3
4
5
6
7
8
PGA280
SBOS487A –JUNE 2009–REVISED SEPTEMBER 2009................................................................................................................................................ www.ti.com
PIN CONFIGURATION
TSSOP-24
DW PACKAGE
(TOP VIEW)
PIN DESCRIPTIONS
PIN NO. NAME DESCRIPTION PIN NO. NAME DESCRIPTION
1 VON Inverting signal output 13 DVDD Digital supply
2 VOP Noninverting signal output 14 SDO SPI slave data output
3 VOCM Input, output common-mode voltage 15 SDI SPI slave data input
4 VSOP Positive supply for output 16 SCLK SPI clock input
5 VSON Negative supply for output, AGND 17 CS SPI chip select input; active low
6 VSP Positive high-voltage supply 18 GPIO6 GPIO 6, SYNC (in), OSC (out), ECS6
7 INP2 AUX input, noninverting 19 GPIO5 GPIO 5, BUFA (out), ECS5
8 INN2 AUX input, inverting 20 GPIO4 GPIO 4, BUFT (in), ECS4
9 INP1 Signal input, noninverting 21 GPIO3 GPIO 3, EF (out), ECS3
10 INN1 Signal input, inverting 22 GPIO2 GPIO 2, ECS2, MUX2
11 VSN Negative high-voltage supply 23 GPIO1 GPIO 1, ECS1, MUX1
12 DGND Digital ground 24 GPIO0 GPIO 0, ECS0, MUX0
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Product Folder Link(s): PGA280