Datasheet
R
50
2
W
R
50
1
W
VOP
VON
R
100
4
W
R
100
3
W
VOP
VON
C
10nF
1
C
10nF
2
C
10nF
3
PGA280
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................................................................................................................................................ SBOS487A –JUNE 2009–REVISED SEPTEMBER 2009
Output Filter
The PGA280 uses chopper technology for excellent dc stability over temperature and life of operation. It also
avoids 1/f frequency (flicker) noise, and therefore enables both high resolution and high repeatability for dc
measurements. While the chopper noise components are internally filtered, a minimal residual amount of
high-frequency switching noise appears at the signal outputs. An external, passive, low-pass filter after the output
stage is recommended to remove this switching noise; Figure 48 shows two examples. This filter can also be
used to isolate or decouple the charge switching pulses of an A/D converter input.
Figure 48. Typical Examples of Recommended Output Filters
Single-Ended Output
The output stage of PGA280 is designed for highest precision. The fully-differential output avoids grounding
errors and noise, and delivers twice the signal amplitude compared to single-ended signals. However, if desired,
the output can be taken single-ended from one of the output pins referred to the voltage at the VOCM pin. The
output stage errors now relate to half the signal amplitude and half the signal gain. The unused output is
unconnected, but not disconnected from error detection. The usable voltage range for the VOCM input is
specified in the Electrical Characteristics and must be observed: the output swing (of both outputs) should not
saturate to the supply. Separate specifications for offset voltage and drift indicate higher offset voltage at lower
gains, because some error sources are not cancelled in the output stage connected in single-ended mode. Note
that the gain is one-half of the gain set in reference to the gain table (see Table 2).
Error Detection
The PGA280 is designed for high dc precision and universal use, but it also allows monitoring of signal integrity.
The device contains an input switch network for signal tests and sense points that can indicate critical conditions.
These added features support fully automated system setup and diagnostic capability. Out-of linear range
conditions are detected and stored in the Error Status Register (Register 4) until reset. The input switches shown
in Figure 44 can be used to short the input to GND, disconnect the signal, insert a 100µA test current, discharge
external capacitance, and switch to a ground (VSON)-referenced signal measurement to observe the signal at
the pin (versus the differential measurement). Figure 49 illustrates the diagnostic points available for error
detection in the device architecture.
All switches are controlled through the SPI. The error signals can be combined using a logic OR function to an
output pin and eventually be used as an error interrupt signal. Errors are normally latched, unless the LTD bit
(latch disable) is set.
The error sensors are filtered with a suppression delay (Register 11). These error signals are normally
suppressed during the buffer (BUFA) active time.
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