Datasheet

Gain
MUX
SwitchNetwork,
CurrentSource
andSink,
andBuffer
DigitalI/O
VSP
VSN
VSOP
VSON
ControlRegisters
DGND
DVDD
INP1
INN1
INP2
INN2
SPI
7xGPIO
VOP
VOCM
VON
PGA280
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................................................................................................................................................ SBOS487A JUNE 2009REVISED SEPTEMBER 2009
APPLICATION INFORMATION
DESCRIPTION
The PGA280 is a universal high-voltage instrumentation amplifier with digital gain control. It offers excellent dc
precision and long-term stability using modern chopper technology with internal filters that minimize
chopper-related noise. The input gain extends from V/V (attenuation) to 128V/V in binary steps. The output
stage offers a gain multiplying factor of 1V/V and 1V/V for optimal gain adjustment. The output stage connects
to the low-voltage (5V or 3V) supply. Figure 43 shows a block diagram of the device.
Figure 43. PGA280 Block Diagram
A signal multiplexer provides two differential inputs. Several signal switches allow signal diagnosis of wire break,
input disconnect, single-ended (versus differential), and shorted inputs.
The supply voltage of up to ±18V offers a wide common-mode range with high input impedance; therefore, large
common-mode noise signals and offsets can be suppressed.
A pair of high-speed current buffers can be activated to avoid inrush currents during fast signal transients, such
as those generated from switching the signal multiplexers. This feature minimizes discharge errors in passive
signal input filters in front of the multiplexer.
The fully differential signal output matches the inputs of modern high-resolution and high-accuracy
analog-to-digital converters (ADCs), including Delta-Sigma (ΔΣ) as well as successive-approximation response
(SAR) converters. The supply voltage for the output stage is normally connected together with the converter
supply, thus preventing signal overloads from the high-voltage analog supply.
Internal error detection in the input and output stage provides individual information about the signal condition.
Integrating ADCs may hide momentary overloads. Together with the input switch matrix, extensive signal and
error diagnosis is made possible.
The serial peripheral interface (SPI) provides write and read access to internal registers. These registers control
gain, the current buffer, input switches, and the general-purpose input/output (GPIO) or special function pins, as
well as configuration and diagnostics.
The GPIO port controls the multiplexer (MUX) and switches and indicates internal conditions; it can also be
individually configured for output or input. A special CS mode for the GPIO extends the communication to other
external SPI devices, such as data converters or shift registers. This special function is intended for SPI
communication via a minimum number of isolation couplers. Additional proof for communication integrity is
provided by an optional checksum byte following each communication block.
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Product Folder Link(s): PGA280