Datasheet

ANALOG INPUTS AND OUTPUTS
PGA2505
www.ti.com ......................................................................................................................................................... SBOS396B – MARCH 2009 – REVISED JUNE 2009
The PGA2505 includes a common-mode servo An over-range indicator output, OVR, is provided at
function. This function is enabled and disabled using pin 6. The OVR pin is an active high,
the CM bit in the serial control word; see Figure 10 . CMOS-logic-level output. The over-range output is
When enabled, the servo provides common-mode forced high when the preamplifier output voltage
negative feedback at the input differential pair, exceeds one of two preset thresholds. The threshold
resulting in very low common-mode input impedance. is programmed through the serial port interface using
The differential input impedance is not affected by the OR bit. If OR = '0', then the output threshold is set
this feedback. This function is useful when the source to 5.1V
RMS
differential, which is approximately 1dB
is floating, or has a high common-mode output below the specified output voltage range. If OR = '1',
impedance. then the output threshold is set to 4.0V
RMS
differential, which is approximately 3dB below the
When the source is floating, the only connection
specified output voltage range.
between the source and the ground is through the
PGA2505 preamplifier input resistance. The input The PGA2505 includes four programmable digital
common-mode parasitic current is determined by high outputs, named GPO1, GPO2, GPO3, and GPO4
output impedance of the source, not by input (pins 2, 3, 4, and 5 respectively), that are controlled
impedance of the amplifier. Therefore, input via the serial port interface. These pins are
common-mode interference can be reduced by CMOS-logic-level outputs. These pins may be used
lowering the common-mode input impedance while at to control relay drivers or switches used for external
the same time not increasing the input common-mode preamplifier functions, including input pads, filtering,
current. Increasing common-mode current degrades polarity reversal, or phantom power.
common-mode rejection. Using the common-mode
servo, overall common-mode rejection can be
improved by suppressing low and medium frequency
An analog signal is input differentially across the V
IN
+
common-mode interference.
(pin 24) and V
IN
– (pin 23) inputs. The input voltage
The common-mode servo function is designed to
range and input impedance are provided in the
operate with a total common-mode input capacitance
Electrical Characteristics table. The Applications
(including the microphone cable capacitance) of up to
Information section of this data sheet provides
10nF. Beyond this limit, stable servo operation is not
additional details regarding typical input circuit
assured.
considerations when interfacing the PGA2505 to a
microphone input.
The common-mode voltage control input, named
V
COM
IN (pin 22), allows the PGA2505 output and
Both V
IN
+ and V
IN
– are biased at approximately
input to be dc-biased to a common-mode voltage
0.65V below the common-mode input voltage,
between 0V and +2.5V and should not be left floating.
supplied at V
COM
IN (pin 22). The use of ac-coupling
This configuration allows for a dc-coupled interface
capacitors (see Figure 10 ) is highly recommended for
between the PGA2505 preamplifier output and the
the analog inputs of the PGA2505. If dc-coupling is
inputs of common single-supply audio ADCs.
required for a given application, the user must take
this offset into account.
The zero crossing control input is provided for
enabling and disabling the internal zero crossing
It is recommended that a small capacitor be
detector function. This function is enabled and
connected from each analog input pin to analog
disabled using the ZC bit in the serial control word;
ground. Values of at least 50pF are recommended.
see Figure 10 . Zero crossing detection is used to
See Figure 10 for larger capacitors used for EMI
force gain changes on zero crossings of the analog
filtering, which satisfies this requirement.
input signal. This configuration limits the glitch energy
The analog output is presented differentially across
associated with switching gain, thereby minimizing
V
OUT
+ (pin 15) and V
OUT
– (pin 14). The output
audible artifacts at the preamplifier output. Because
voltage range is provided in the Electrical
zero crossing detection can add some delay when
Characteristics table. The analog output is designed
performing gain changes (up to 16ms maximum for a
to drive a 600 Ω differential load while meeting the
detector timeout event), there may be cases where
published THD+N specifications and typical
the user may wish to disable the function. Setting the
performance graphs.
ZC bit high enables zero crossing detection, with gain
changes occurring immediately when programmed.
Note that because the zero crossing detector requires
setup, the user should set the ZC bit as a first
operation. Subsequent changes in gain occur on the
zero crossings provided that the ZC bit setting is
maintained.
Copyright © 2009, Texas Instruments Incorporated 9
Product Folder Link(s): PGA2505