Datasheet

"#$%%
SBOS289ANOVEMBER 2003 − REVISED DECEMBER 2003
www.ti.com
4
PIN CONFIGURATION
PGA2500
1
2
3
4
5
28
27
26
25
24
AGND
V
IN
+
V
IN
V
COM
IN
C
S11
GPO1
GPO2
GPO3
GPO4
OVR
6
7
8
9
10
11
12
13
14
23
22
21
20
19
18
17
16
15
C
S12
C
S21
C
S22
VA
VA+
VA+
V
OUT
+
V
OUT
VA
DGND
DCEN
0dB
ZCEN
SDI
CS
SCLK
SDO
VD
PIN DESCRIPTIONS
PIN NUMBER NAME DESCRIPTION
1 GPO1 General-Purpose CMOS Logic Output
2 GPO2 General-Purpose CMOS Logic Output
3 GPO3 General-Purpose CMOS Logic Output
4 GPO4 General-Purpose CMOS Logic Output
5 OVR Over Range Output (Active High)
6 DGND Digital Ground
7 DCEN DC Servo Enable (Active Low)
8 0dB Unity Gain Enable (Active High)
9 ZCEN Zero Crossing Detector Enable (Active High)
10 SDI Serial Data Input
11 CS Chip Select Input (Active Low)
12 SCLK Serial Data Clock Input
13 SDO Serial Data Output
14 VD− −5V Digital Supply
15 VA −5V Analog Supply
16 V
OUT
Analog Output, Inverting
17 V
OUT
+ Analog Output, Non-Inverting
18 VA+ +5V Analog Supply
19 VA+ +5V Analog Supply
20 VA −5V Analog Supply
21 C
S22
DC Servo Capacitor #2, Terminal 2
22 C
S21
DC Servo Capacitor #2, Terminal 1
23 C
S12
DC Servo Capacitor #1, Terminal 2
24 C
S11
DC Servo Capacitor #1, Terminal 1
25 V
COM
IN Common Mode Voltage Input, 0V to +2.5V
26 V
IN
Analog Input, Inverting
27 V
IN
+ Analog Input, Noninverting
28 AGND Analog Ground