Datasheet

PGA2310-EVM
6
SBOU012
FIGURE 7. Schematic Drawing.
135791113
2 4 6 8 10 12 14
135791113
246810
123 45 6
12 14
PIN 1
PIN 2
PIN 3
PIN 4
PIN 5
PIN 6
PIN 7
PIN 8
PIN 9
PIN 10
PIN 11
PIN 12
PIN 13
PIN 14
PIN 15
PIN 16
PIN 17
PIN 18
PIN 19
PIN 20
PIN 21
PIN 22
PIN 23
PIN 24
PIN 25
MUTE
SCLK
SDI(N + 1)
CS
ZCEN
RB
MUTE
SCLK
SDI(N + 1)
CS
ZCEN
RB
DATA OUT
DATA IN
SDO R
SDO (N)
10
8
6
4
2
9
7
5
3
1
RNZ
10kΩ
RN1
47kΩ
SDI(1)
LPT
U
2
U
1
A1
A2
A3
A4
A5
A6
A7
A8
G1
G2
ZCEN
CS
SDATA IN
VD+
DGND
SCLK
SDATA OUT
MUTE
16
15
14
13
12
11
10
9
AINL
AGNDL
AOUTL
VA–
VA+
AOUTR
AGNDR
AINR
1
2
3
4
5
6
7
8
2
3
4
5
6
7
8
9
1
19
18
17
16
15
14
13
12
11
20
10
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
V
CC
GND
SN74NC541N
C7
0.01µF
C
1
10uF
35V
C
2
0.1uF
ZCEN
CS
SDI
L
1
IND
R
1
10Ω 1%
1/8W
TP5 TP6
J
3
J
1
J
2
VD+ VA+ GND VA–
C
3
10uF
35V
C
4
0.1uF
C
5
10uF
35V
C
6
0.1uF
C
8
1uF
25V
C
9
0.1uF
SCK
MUTE
SDO
TP7
C
10
0.1uF
C
11
0.1uF
TP1
TP3
TP4
TP2
100kΩ